From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49730) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XXIa7-0006Hs-FR for qemu-devel@nongnu.org; Thu, 25 Sep 2014 19:36:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XXIZy-0004OC-6r for qemu-devel@nongnu.org; Thu, 25 Sep 2014 19:36:15 -0400 Received: from mail-pa0-x230.google.com ([2607:f8b0:400e:c03::230]:36729) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XXIZx-0004MN-UK for qemu-devel@nongnu.org; Thu, 25 Sep 2014 19:36:06 -0400 Received: by mail-pa0-f48.google.com with SMTP id bj1so4598188pad.35 for ; Thu, 25 Sep 2014 16:35:59 -0700 (PDT) Date: Fri, 26 Sep 2014 09:31:19 +1000 From: "Edgar E. Iglesias" Message-ID: <20140925233119.GW16081@toto> References: <1410582564-27687-1-git-send-email-edgar.iglesias@gmail.com> <1410582564-27687-9-git-send-email-edgar.iglesias@gmail.com> <20140925225521.GT16081@toto> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH v6 08/10] target-arm: A64: Emulate the SMC insn List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Rob Herring , Peter Crosthwaite , Fabian Aggeler , QEMU Developers , Alexander Graf , Greg Bellows , Paolo Bonzini , Alex =?iso-8859-1?Q?Benn=E9e?= , Christoffer Dall , Richard Henderson On Fri, Sep 26, 2014 at 12:17:59AM +0100, Peter Maydell wrote: > On 25 September 2014 23:55, Edgar E. Iglesias wrote: > > On Thu, Sep 25, 2014 at 07:47:16PM +0100, Peter Maydell wrote: > >> > + /* In NS EL1, HCR controlled routing to EL2 has priority over SMD. */ > >> > + if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) { > >> > + env->exception.syndrome = syndrome; > >> > + raise_exception(env, EXCP_SMC); > >> > >> Shouldn't this just be returning so that the generated > >> code immediately following can raise the SMC exception > >> with the correct syndrome, PC and singlestep state? > >> (would also save you passing in the syndrome argument > >> to this fn). > > > > When routing SMCs to EL2, the exception happens before advancing the > > PC. It's similar to the undef cases for HVC (and SMC). > > Oh, yes, that's the trap enable bit. In that case we shouldn't > be using EXCP_SMC: this isn't routing the SMC exception, it's > taking a Hyp trap exception, and in AArch32 the vector > entry point is different. (Granted, you can't get to AArch32 > by taking an exception from AArch64, but we should use the > right EXCP_ value to avoid the code looking gratuitously > different for the two cases.) I see. I hadn't thought much about the AArch32 case here. For AArch64, the pseudo code referes to this as route_to_el2. Anyway, your comment makes sense to avoid diff between a32/a64 and I think it actually makes the AArch64 code a bit cleaner aswell. I'll add EXCP_HYP_TRAP. Thanks, Edgar