From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38498) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XlJmg-0001dN-MC for qemu-devel@nongnu.org; Mon, 03 Nov 2014 10:43:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XlJmS-0004Zj-9y for qemu-devel@nongnu.org; Mon, 03 Nov 2014 10:43:10 -0500 Received: from e06smtp17.uk.ibm.com ([195.75.94.113]:44527) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XlJmS-0004ZP-06 for qemu-devel@nongnu.org; Mon, 03 Nov 2014 10:42:56 -0500 Received: from /spool/local by e06smtp17.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 3 Nov 2014 15:42:54 -0000 Date: Mon, 3 Nov 2014 16:42:49 +0100 From: Thomas Huth Message-ID: <20141103164249.1a125c9f@oc7435384737.ibm.com> In-Reply-To: <1414771575-7930-1-git-send-email-tommusta@gmail.com> References: <1414771575-7930-1-git-send-email-tommusta@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-ppc: Fix Altivec Round Opcodes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Tom Musta Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, agraf@suse.de On Fri, 31 Oct 2014 11:06:15 -0500 Tom Musta wrote: > Correct the opcodes for the vrfim, vrfin and vrfiz instructions. > > Signed-off-by: Tom Musta > --- > target-ppc/translate.c | 12 ++++++------ > 1 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/target-ppc/translate.c b/target-ppc/translate.c > index 4a00935..c064cc9 100644 > --- a/target-ppc/translate.c > +++ b/target-ppc/translate.c > @@ -7286,10 +7286,10 @@ GEN_VXFORM_NOA_ENV(vrefp, 5, 4); > GEN_VXFORM_NOA_ENV(vrsqrtefp, 5, 5); > GEN_VXFORM_NOA_ENV(vexptefp, 5, 6); > GEN_VXFORM_NOA_ENV(vlogefp, 5, 7); > -GEN_VXFORM_NOA_ENV(vrfim, 5, 8); > -GEN_VXFORM_NOA_ENV(vrfin, 5, 9); > +GEN_VXFORM_NOA_ENV(vrfim, 5, 11); > +GEN_VXFORM_NOA_ENV(vrfin, 5, 8); > GEN_VXFORM_NOA_ENV(vrfip, 5, 10); > -GEN_VXFORM_NOA_ENV(vrfiz, 5, 11); > +GEN_VXFORM_NOA_ENV(vrfiz, 5, 9); > > #define GEN_VXFORM_SIMM(name, opc2, opc3) \ > static void glue(gen_, name)(DisasContext *ctx) \ > @@ -10524,10 +10524,10 @@ GEN_VXFORM_NOA(vrefp, 5, 4), > GEN_VXFORM_NOA(vrsqrtefp, 5, 5), > GEN_VXFORM_NOA(vexptefp, 5, 6), > GEN_VXFORM_NOA(vlogefp, 5, 7), > -GEN_VXFORM_NOA(vrfim, 5, 8), > -GEN_VXFORM_NOA(vrfin, 5, 9), > +GEN_VXFORM_NOA(vrfim, 5, 11), > +GEN_VXFORM_NOA(vrfin, 5, 8), > GEN_VXFORM_NOA(vrfip, 5, 10), > -GEN_VXFORM_NOA(vrfiz, 5, 11), > +GEN_VXFORM_NOA(vrfiz, 5, 9), > > #undef GEN_VXFORM_UIMM > #define GEN_VXFORM_UIMM(name, opc2, opc3) \ Looks right to me. Reviewed-by: Thomas Huth