From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55805) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xo2Ay-0007Mm-Aw for qemu-devel@nongnu.org; Mon, 10 Nov 2014 22:31:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Xo2Am-0006JF-Qm for qemu-devel@nongnu.org; Mon, 10 Nov 2014 22:31:28 -0500 Date: Tue, 11 Nov 2014 14:24:21 +1100 From: David Gibson Message-ID: <20141111032421.GH15270@voom.redhat.com> References: <20141105071019.26196.93729.stgit@aravindap> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="VbfcI4OLZ4XW0yH2" Content-Disposition: inline In-Reply-To: <20141105071019.26196.93729.stgit@aravindap> Subject: Re: [Qemu-devel] [PATCH v3 0/4] target-ppc: Add FWNMI support in qemu for powerKVM guests List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aravinda Prasad Cc: qemu-ppc@nongnu.org, benh@au1.ibm.com, aik@au1.ibm.com, qemu-devel@nongnu.org, paulus@samba.org --VbfcI4OLZ4XW0yH2 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Nov 05, 2014 at 12:42:03PM +0530, Aravinda Prasad wrote: > This series of patches add support for fwnmi in powerKVM guests. >=20 > Currently upon machine check exception, if the address in > error belongs to guest then KVM invokes guest's NMI interrupt > vector 0x200. >=20 > This patch series adds functionality where the guest's 0x200 > interrupt vector is patched such that QEMU gets control. QEMU > then builds error log and reports the error to OS registered > machine check handlers through RTAS space. >=20 > Apart from this, the patch series also takes care of synchronization > when multiple processors encounter machine check at or about the > same time. >=20 > The patch set was tested by simulating a machine check error in > the guest. >=20 > Changes in v3: > - Incorporated review comments > - Byte codes in patch 4/4 are now moved to > pc-bios/spapr-rtas/spapr-rtas.S as instructions. > - Defined the RTAS blob in-memory layout. > - FIX: save and restore cr register in the trampoline >=20 > Changes in v2: > - Re-based to github.com/agraf/qemu.git branch: ppc-next > - Merged patches 4 and 5. > - Incorporated other review comments So, this may not still be possible depending on whether the KVM side of this is already merged, but it occurs to me that there's a simpler way. Rather than mucking about with having to update the hypervisor on the RTAS location, they have qemu copy the code out of RTAS, patch it and copy it back into the vector, you could instead do this: 1. Make KVM instead of immediately delivering a 0x200 for a guest machine check, cause a special exit to qemu. 2. Have the register-nmi RTAS call store the guest side MC handler address in the spapr structure, but perform no actual guest code patching. 3. Allocate the error log buffer independently from the RTAS blob, so qemu always knows where it is. 4. When qemu gets the MC exit condition, instead of going via a patched 0x200 vector, just directly set the guest register state and jump straight into the guest side MC handler. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --VbfcI4OLZ4XW0yH2 Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJUYYFlAAoJEGw4ysog2bOSTnoP/j0ozZr45nk8IXFQUXdn+LGS jEqNJQeRmA2K534Rd/SGdyLkxqlU8dyQxkctTRRJiQflUGW4MZSS0luqLco9KIea gTouQlJm0X15umSt8zJ8JGUcMbtKNy8QWSAcmd9iy32ETR7WXr+fseChb5WgdvqJ MFlbjzHId1BSnUoI9NutlZ6NQyf/y5E94FLddxpIJNzqAYSwMX5QviRNkc6JjTXK 2GjlPTBjtPsuBlda4ASz8wVOdNSdd8wM/qvm1MCNzGyaDklvp9ohUCSXmkzNyULK JG/Of5kgO/u4U9h6F9flfiDSyoxj9elFzFchcFQxVsj+4c/MiDh2e9kpMhAfrfSV uNUyhI92m+R8LrFD/3oXqcqy2lQRsuIvu30waYhd5pOu6CN+pQTG0AaqMFGJ2xlX moT0y+PmQ7NtVlA0+8pQf5agd5DsKoAY5nITCo7T+lWomsJBcjg6x25yFPdd7NNH xE2AmjBqtyX5AzCdx+JhyXfwjcyF9FNbqwD228UJv+3A4jFiTYb7VYbxaUNuYKQx QihpyGNVcH9d5WnlFdrBN7HR0qRsjxIEAJOfWQ3McARqI14HJsawHBVRO/Uo92vU DSxl1DKZDkjna5Zi5ehQmIDsJZ1OrYdcUBwq4FdcxqJprjP233JONORkOtI1nmRp 36PxYIFNgOAFvN+DfH86 =Sb2X -----END PGP SIGNATURE----- --VbfcI4OLZ4XW0yH2--