From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43883) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAeyl-0000ci-54 for qemu-devel@nongnu.org; Mon, 12 Jan 2015 08:24:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YAeyc-0003uV-Lr for qemu-devel@nongnu.org; Mon, 12 Jan 2015 08:24:23 -0500 Received: from e35.co.us.ibm.com ([32.97.110.153]:50146) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAeyc-0003tk-Ef for qemu-devel@nongnu.org; Mon, 12 Jan 2015 08:24:14 -0500 Received: from /spool/local by e35.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 12 Jan 2015 06:24:12 -0700 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Michael Roth In-Reply-To: <1419363216-26601-1-git-send-email-mdroth@linux.vnet.ibm.com> References: <1419363216-26601-1-git-send-email-mdroth@linux.vnet.ibm.com> Message-ID: <20150112132406.22996.59621@loki> Date: Mon, 12 Jan 2015 07:24:06 -0600 Subject: Re: [Qemu-devel] [PATCH 0/1] pci: allow 0 address for PCI IO/MEM regions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, mst@redhat.com, aik@ozlabs.ru, agraf@suse.de, qemu-ppc@nongnu.org, hw.claudio@gmail.com, david@gibson.dropbear.id.au Quoting Michael Roth (2014-12-23 13:33:35) > This patch enables the programming of address 0 for IO/MMIO BARs for > PCI devices. > = > It was originally included as part of a series implementing PCI > hotplug for pseries guests, where it is needed due to the fact > that pseries guests access IO space via MMIO, and that IO > space is dedicated to PCI devices, with RTAS calls being used in > place of common/legacy IO ports such as config-data/config-address. > = > Thus, the entire range is unhindered by legacy IO ports, and > pseries guest kernels may attempt to program an IO BAR to address 0 > as a result. > = > This has led to a conflict with the existing PCI config space > emulation code, where it has been assumed that 0 address are always > invalid. > = > Some background from discussions can be viewed here: > = > https://lists.nongnu.org/archive/html/qemu-devel/2014-08/msg03063.html > = > The general summary from that discussion seems to be that 0-addresses are > not (at least, are no longer) prohibited by current versions of the PCI > spec, and that the same should apply for MMIO addresses (where allowing > 0-addresses are also needed for some ARM-based PCI controllers). > = > This patch includes support for 0-address MMIO BARs based on that > discussion. > = > One still-lingering concern is whether this change will impact > compatibility with guests where 0-addresses are invalid. There was > some discussion on whether this issue could be addressed using > memory region priorities, but I think that's still an open question > that we can hopefully address here. Ping