From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35481) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YAuO1-0004bx-Nj for qemu-devel@nongnu.org; Tue, 13 Jan 2015 00:51:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YAuNx-0000g1-Nl for qemu-devel@nongnu.org; Tue, 13 Jan 2015 00:51:29 -0500 Date: Tue, 13 Jan 2015 16:46:55 +1100 From: David Gibson Message-ID: <20150113054655.GK3654@voom.BigPond> References: <1419363216-26601-1-git-send-email-mdroth@linux.vnet.ibm.com> <20150112132406.22996.59621@loki> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="7vAdt9JsdkkzRPKN" Content-Disposition: inline In-Reply-To: <20150112132406.22996.59621@loki> Subject: Re: [Qemu-devel] [PATCH 0/1] pci: allow 0 address for PCI IO/MEM regions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Michael Roth Cc: peter.maydell@linaro.org, mst@redhat.com, aik@ozlabs.ru, agraf@suse.de, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, hw.claudio@gmail.com --7vAdt9JsdkkzRPKN Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jan 12, 2015 at 07:24:06AM -0600, Michael Roth wrote: > Quoting Michael Roth (2014-12-23 13:33:35) > > This patch enables the programming of address 0 for IO/MMIO BARs for > > PCI devices. > >=20 > > It was originally included as part of a series implementing PCI > > hotplug for pseries guests, where it is needed due to the fact > > that pseries guests access IO space via MMIO, and that IO > > space is dedicated to PCI devices, with RTAS calls being used in > > place of common/legacy IO ports such as config-data/config-address. > >=20 > > Thus, the entire range is unhindered by legacy IO ports, and > > pseries guest kernels may attempt to program an IO BAR to address 0 > > as a result. > >=20 > > This has led to a conflict with the existing PCI config space > > emulation code, where it has been assumed that 0 address are always > > invalid. > >=20 > > Some background from discussions can be viewed here: > >=20 > > https://lists.nongnu.org/archive/html/qemu-devel/2014-08/msg03063.html > >=20 > > The general summary from that discussion seems to be that 0-addresses a= re > > not (at least, are no longer) prohibited by current versions of the PCI > > spec, and that the same should apply for MMIO addresses (where allowing > > 0-addresses are also needed for some ARM-based PCI controllers). > >=20 > > This patch includes support for 0-address MMIO BARs based on that > > discussion. > >=20 > > One still-lingering concern is whether this change will impact > > compatibility with guests where 0-addresses are invalid. There was > > some discussion on whether this issue could be addressed using > > memory region priorities, but I think that's still an open question > > that we can hopefully address here. >=20 > Ping Sorry, I just got back from vacation. It looks same to me. Reviewed-by: David Gibson --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --7vAdt9JsdkkzRPKN Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJUtLFPAAoJEGw4ysog2bOSKEEQALvbKwZHYaTz2WMsswYgSHXM bU2Aaa7ACTVXpIzD8Dc1jCo+9Wp7ZRcKbYvha6iq3PKDIiPXGrszByilw65U/YKL 6a5nMth2DaezYAPJpWwmGgurVbzmP+aoQSC4aT3Iniwo0Iva+dWIHmHY74eT3MPg NqUuWLr1jqm7+NgJtCFMtt2dJCP+V1xzNQ9cT/osrfxt+Xc+8wyYXMjI4+OYqtqd h6CSCW4H3N4uJCAenC+RrAY7OKE21vflfG+8fmORAfcf8Sm7itgtjdjN79KkkQgx RTOB1AACJx2cCRoZdC8/uxARe0HH6sgvetBz/zijAVWIu7QLE5AVW7RwKoQMwAZk ibmD7hGh8cm0qvUIVoTiuq2Cze3Q2C/5OR1sbgMXoYFPEble9H6emx9erPVStB7w +5VoJhlBMCQKekfpgQL1cB+KRCeN/NkZURSBPdocFRkHsPX3fGS2vsWlIKV9HKZI eJ+i4xNf8Lb892+dmMh52S1ybgL1xYV6DS3cqIeHPQmQJHtV7uwc7tKNH6UtYqgp dDsP0la6OPiEbD9NfwBr04rEBxK+kUUKs0eAid0+OWsUsvTvgIttVWwmn2vnRYXz LYnwIHRH0yV23mdk0jhPihU5xpgmTb0hLaWsttRqksGD1/yY2D7j01LgtEastwgB m0dIZK4fID67/B93hQ3P =mT5N -----END PGP SIGNATURE----- --7vAdt9JsdkkzRPKN--