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From: Igor Mammedov <imammedo@redhat.com>
To: Greg Bellows <greg.bellows@linaro.org>
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Christoffer Dall" <christoffer.dall@linaro.org>,
	"Andreas Färber" <afaerber@suse.de>
Subject: Re: [Qemu-devel] [PATCH 1/5] target-arm: Add ARM CPU feature parsing
Date: Tue, 20 Jan 2015 17:05:40 +0100	[thread overview]
Message-ID: <20150120170540.18c7f845@nial.brq.redhat.com> (raw)
In-Reply-To: <CAOgzsHVsFjgcoN0SU+KL01kqi7cOuqRv5gfsiYV5p_zw921YeA@mail.gmail.com>

On Tue, 20 Jan 2015 09:34:39 -0600
Greg Bellows <greg.bellows@linaro.org> wrote:

> On Tue, Jan 20, 2015 at 9:22 AM, Igor Mammedov <imammedo@redhat.com> wrote:
> 
> > On Mon, 19 Jan 2015 16:30:17 -0600
> > Greg Bellows <greg.bellows@linaro.org> wrote:
> >
> > > Adds a CPU feature parsing function and assigns to the CPU class.  The
> > only
> > > feature added was "-aarch64" which disabled the AArch64 execution state
> > on a
> > > 64-bit ARM CPU.
> > >
> > > Also adds stripping of features from CPU model string in acquiring the
> > ARM CPU
> > > by name.
> > >
> > > Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
> > > ---
> > >  target-arm/cpu.c | 45 ++++++++++++++++++++++++++++++++++++++++++++-
> > >  1 file changed, 44 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> > > index 285947f..f327dd7 100644
> > > --- a/target-arm/cpu.c
> > > +++ b/target-arm/cpu.c
> > > @@ -514,13 +514,17 @@ static ObjectClass *arm_cpu_class_by_name(const
> > char *cpu_model)
> > >  {
> > >      ObjectClass *oc;
> > >      char *typename;
> > > +    char *cpuname;
> > >
> > >      if (!cpu_model) {
> > >          return NULL;
> > >      }
> > >
> > > -    typename = g_strdup_printf("%s-" TYPE_ARM_CPU, cpu_model);
> > > +    cpuname = g_strdup(cpu_model);
> > > +    cpuname = strtok(cpuname, ",");
> > > +    typename = g_strdup_printf("%s-" TYPE_ARM_CPU, cpuname);
> > >      oc = object_class_by_name(typename);
> > > +    g_free(cpuname);
> > >      g_free(typename);
> > >      if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) ||
> > >          object_class_is_abstract(oc)) {
> > > @@ -1163,6 +1167,44 @@ static Property arm_cpu_properties[] = {
> > >      DEFINE_PROP_END_OF_LIST()
> > >  };
> > >
> > > +static void arm_cpu_parse_features(CPUState *cs, char *features,
> > > +                                   Error **errp)
> > > +{
> > > +    ARMCPU *cpu = ARM_CPU(cs);
> > > +    char *featurestr;
> > > +
> > > +    featurestr = features ? strtok(features, ",") : NULL;
> > > +    while (featurestr) {
> > > +        if (featurestr[0] == '-') {
> > ...
> > > +        } else if (featurestr[0] == '+') {
> > Please do not use legacy +-feature format and support only foo=val format.
> > Other targets have it only for to being able support legacy setups
> > which use +- format.
> >
> >
> ​Thanks Igor. I was under the impression that the +/- notation was still
> relevant. Perhaps it makes the most sense to convert to using object
> properties similar to how machine options are specified? ​What do you think
> Peter?
Yep make features as object properties and reuse generic property parsing.
Since you do not have to support legacy format, you actually do not need
to define arm_cpu_parse_features() callback because foo=val format
can be parsed by generic property parsing infrastructure.

> 
> 
> > > +            /* Everything else is a bad format */
> > > +            error_setg(errp, "CPU property string '%s' not in format "
> > > +                             "(+feature|-feature|feature=xyz)",
> > featurestr);
> >
> >
> > > +            return;
> > > +        }
> > > +        featurestr = strtok(NULL, ",");
> > > +    }
> > > +}
> > > +
> > >  static void arm_cpu_class_init(ObjectClass *oc, void *data)
> > >  {
> > >      ARMCPUClass *acc = ARM_CPU_CLASS(oc);
> > > @@ -1183,6 +1225,7 @@ static void arm_cpu_class_init(ObjectClass *oc,
> > void *data)
> > >      cc->set_pc = arm_cpu_set_pc;
> > >      cc->gdb_read_register = arm_cpu_gdb_read_register;
> > >      cc->gdb_write_register = arm_cpu_gdb_write_register;
> > > +    cc->parse_features = arm_cpu_parse_features;
> > >  #ifdef CONFIG_USER_ONLY
> > >      cc->handle_mmu_fault = arm_cpu_handle_mmu_fault;
> > >  #else
> >
> >

  parent reply	other threads:[~2015-01-20 16:05 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-19 22:30 [Qemu-devel] [PATCH 0/5] target-arm: ARM64: Adding EL1 AARCH32 guest support Greg Bellows
2015-01-19 22:30 ` [Qemu-devel] [PATCH 1/5] target-arm: Add ARM CPU feature parsing Greg Bellows
2015-01-20 14:19   ` Alex Bennée
2015-01-20 14:49     ` Greg Bellows
2015-01-21 10:57       ` Alex Bennée
2015-01-20 15:22   ` Igor Mammedov
2015-01-20 15:34     ` Peter Maydell
2015-01-20 15:59       ` Igor Mammedov
2015-01-20 16:08         ` Peter Maydell
2015-01-20 16:25           ` Igor Mammedov
2015-01-20 22:45             ` Greg Bellows
2015-01-21 11:33               ` Igor Mammedov
2015-01-20 15:34     ` Greg Bellows
2015-01-20 16:02       ` Eduardo Habkost
2015-01-20 16:05       ` Igor Mammedov [this message]
2015-01-19 22:30 ` [Qemu-devel] [PATCH 2/5] target-arm: Add feature parsing to virt Greg Bellows
2015-01-20 16:58   ` Alex Bennée
2015-01-19 22:30 ` [Qemu-devel] [PATCH 3/5] target-arm: Add 32/64-bit register sync Greg Bellows
2015-01-19 22:30 ` [Qemu-devel] [PATCH 4/5] target-arm: Add AArch32 guest support to KVM64 Greg Bellows
2015-01-20 16:57   ` Alex Bennée
2015-01-20 20:03     ` Greg Bellows
2015-01-21 10:54       ` Alex Bennée
2015-01-21 10:56         ` Peter Maydell
2015-01-19 22:30 ` [Qemu-devel] [PATCH 5/5] target-arm: Adjust kernel load address for Image Greg Bellows
2015-01-20 10:21 ` [Qemu-devel] [PATCH 0/5] target-arm: ARM64: Adding EL1 AARCH32 guest support Sergey Fedorov
2015-01-20 10:26   ` Peter Maydell

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