From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50973) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YNNs3-00059t-CH for qemu-devel@nongnu.org; Mon, 16 Feb 2015 10:46:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YNNry-0005Cs-Kk for qemu-devel@nongnu.org; Mon, 16 Feb 2015 10:46:03 -0500 Received: from mx1.redhat.com ([209.132.183.28]:41197) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YNNry-0005Cm-Bl for qemu-devel@nongnu.org; Mon, 16 Feb 2015 10:45:58 -0500 Date: Mon, 16 Feb 2015 16:45:51 +0100 From: "Michael S. Tsirkin" Message-ID: <20150216154551.GA25470@redhat.com> References: <1423839431-3563-1-git-send-email-pbonzini@redhat.com> <1423839431-3563-2-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1423839431-3563-2-git-send-email-pbonzini@redhat.com> Subject: Re: [Qemu-devel] [PATCH 1/3] pcie: remove mmconfig memory leak and wrap mmconfig update with transaction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: mjrosato@linux.vnet.ibm.com, alex.williamson@redhat.com, qemu-devel@nongnu.org On Fri, Feb 13, 2015 at 03:57:09PM +0100, Paolo Bonzini wrote: > This memory leak was introduced inadvertently by omitting object_unparent. > A better fix is to use the new memory_region_set_size instead of destroying > and recreating the MMIO region on the fly. > > Also, ensure that unmapping and remapping the region is done atomically. > > Signed-off-by: Paolo Bonzini Reviewed-by: Michael S. Tsirkin > --- > hw/pci/pcie_host.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c > index dfb4a2b..d8afba8 100644 > --- a/hw/pci/pcie_host.c > +++ b/hw/pci/pcie_host.c > @@ -88,6 +88,8 @@ static void pcie_host_init(Object *obj) > PCIExpressHost *e = PCIE_HOST_BRIDGE(obj); > > e->base_addr = PCIE_BASE_ADDR_UNMAPPED; > + memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, "pcie-mmcfg-mmio", > + PCIE_MMCFG_SIZE_MAX); > } > > void pcie_host_mmcfg_unmap(PCIExpressHost *e) > @@ -104,8 +106,7 @@ void pcie_host_mmcfg_init(PCIExpressHost *e, uint32_t size) > assert(size >= PCIE_MMCFG_SIZE_MIN); > assert(size <= PCIE_MMCFG_SIZE_MAX); > e->size = size; > - memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, > - "pcie-mmcfg", e->size); > + memory_region_set_size(&e->mmio, e->size); > } > > void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr, > @@ -121,10 +122,12 @@ void pcie_host_mmcfg_update(PCIExpressHost *e, > hwaddr addr, > uint32_t size) > { > + memory_region_transaction_begin(); > pcie_host_mmcfg_unmap(e); > if (enable) { > pcie_host_mmcfg_map(e, addr, size); > } > + memory_region_transaction_commit(); > } > > static const TypeInfo pcie_host_type_info = { > -- > 1.8.3.1 >