From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36040) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOHr2-0008Ec-Ae for qemu-devel@nongnu.org; Wed, 18 Feb 2015 22:32:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YOHr1-0004Rd-3T for qemu-devel@nongnu.org; Wed, 18 Feb 2015 22:32:44 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:32940) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YOHr0-0004Pl-P0 for qemu-devel@nongnu.org; Wed, 18 Feb 2015 22:32:43 -0500 Date: Thu, 19 Feb 2015 13:05:56 +1100 From: David Gibson Message-ID: <20150219020556.GD7312@voom.redhat.com> References: <1424235596-29024-1-git-send-email-david@gibson.dropbear.id.au> <54E445F3.3070802@redhat.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="7gGkHNMELEOhSGF6" Content-Disposition: inline In-Reply-To: <54E445F3.3070802@redhat.com> Subject: Re: [Qemu-devel] [PATCH] Make i82801b11 and ioh3420 x86 only by default List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: yamahata@valinux.co.jp, qemu-devel@nongnu.org, mst@redhat.com --7gGkHNMELEOhSGF6 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Feb 18, 2015 at 08:57:39AM +0100, Paolo Bonzini wrote: >=20 >=20 > On 18/02/2015 05:59, David Gibson wrote: > > As PCI devices, the i82801b11 and ioh3420 devices could theoretically e= xist > > on any platform with a PCI bus. However in practice, they're Intel > > specific devices, >=20 > They can be used as a generic PCIe root port and PCIe-to-PCI bridge, > they're not Intel-specific as long as your firmware doesn't care about > the vendor and device id. Hm, ok. > > that are very unlikely to appear on anything other than > > an x86. Therefore this patch gives them their own config options, enab= led > > only for x86 targets by default. >=20 > I think it's quite likely that we'll use them, or at least ioh3420, on > any PCIe machine. So you probably want to add ioh3420 to arm-softmmu > and aarch64-softmmu as well. I don't know about i82801b11, but it > doesn't hurt to have it in ARM/AArch64 either. >=20 > Also, the same can be done for xio3130, so you can also limit that one > to x86 and ARM/Aarch64. Ok, I'll revise accordingly. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --7gGkHNMELEOhSGF6 Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJU5UUDAAoJEGw4ysog2bOSAEIP/1FBow3JN8DVkOeA4TmWLSHO QTwUMr+D0TU49PMZjCk/xV/j++OpmLA3OrR7ORsRoOJPKIH/wgx300Em+P8ebWvS imgtnIf0J84VmolzpKKscX5VzR6K0kgKCu6Hq8HLc5vsKEQV2o5CTcEd/c7xuWaw G3rpPw3t3UC+UhYY61M78bsb0WlCBRgu9brAhUjy2H1m08Tgh8HDyT+AyPpDYb98 M7BJcqjZSqcqetW7HSPExAZ+ubpA2OrOrxPajO2BfD4xOirwU/bjvlRAESaRX+FO FySrpqQGy2XEb/KgAuslM3iFqz0EEMk7XC4W81zokqnR0CV51Mm2eVCeqFH9cbRs vIIw3tZ55NqQ3CcNeyTDVSQP7rkEbb0/llWgeC+8kd+RPoAAlxKnrsJKkXls7VDK JLFfd8v/xwjD1TSBIHr+fMsXteMp5PplJ1/FjyFi1MOMe1khGMyBHXRBY+h6JqBL aBE9MZxY0eNSyFikLZMzcL9+V8rNwDCocJ02RtT9v9Ugic91xbUcccmXpkAkfn7Z iucvNtG7AznOMli9aDx1xndSgTnF2Xy+HzTNQCofPfoBIN3/vvIHgv3W+kQRvRu3 TcDtnJEYkEkMZOrUYeM+35/vHvL0kYTha2JgYwrhyg/D+UWRJP57aRJFgI39Lq93 QV6FAI6q78EKlYrSzEOf =4y+G -----END PGP SIGNATURE----- --7gGkHNMELEOhSGF6--