From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40373) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YQpoP-0002DC-OT for qemu-devel@nongnu.org; Wed, 25 Feb 2015 23:12:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YQpoO-00037b-E8 for qemu-devel@nongnu.org; Wed, 25 Feb 2015 23:12:33 -0500 Date: Thu, 26 Feb 2015 14:49:16 +1100 From: David Gibson Message-ID: <20150226034916.GB29409@voom.fritz.box> References: <1424096872-29868-1-git-send-email-mdroth@linux.vnet.ibm.com> <1424096872-29868-16-git-send-email-mdroth@linux.vnet.ibm.com> <20150225031129.GD15695@voom.fritz.box> <20150225051724.31752.99805@loki> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="uZ3hkaAS1mZxFaxD" Content-Disposition: inline In-Reply-To: <20150225051724.31752.99805@loki> Subject: Re: [Qemu-devel] [PATCH v5 15/16] spapr_pci: enable basic hotplug operations List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Michael Roth Cc: aik@ozlabs.ru, qemu-devel@nongnu.org, agraf@suse.de, ncmike@ncultra.org, qemu-ppc@nongnu.org, tyreld@linux.vnet.ibm.com, bharata.rao@gmail.com, nfont@linux.vnet.ibm.com --uZ3hkaAS1mZxFaxD Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Feb 24, 2015 at 11:17:24PM -0600, Michael Roth wrote: > Quoting David Gibson (2015-02-24 21:11:29) > > On Mon, Feb 16, 2015 at 08:27:51AM -0600, Michael Roth wrote: > > > This enables hotplug for PHB bridges. Upon hotplug we generate the > >=20 > > "PCI Host Bridge bridges" :-p > >=20 > > > OF-nodes required by PAPR specification and IEEE 1275-1994 > > > "PCI Bus Binding to Open Firmware" for the device. > > >=20 > > > We associate the corresponding FDT for these nodes with the DrcEntry > > > corresponding to the slot, which will be fetched via > > > ibm,configure-connector RTAS calls by the guest as described by PAPR > > > specification. The FDT is cleaned up in the case of unplug. > > >=20 > > > Signed-off-by: Michael Roth > > > --- > > > hw/ppc/spapr_pci.c | 391 +++++++++++++++++++++++++++++++++++++++++++= +++++++--- > > > 1 file changed, 371 insertions(+), 20 deletions(-) > > >=20 > > > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c > > > index 6a3d917..b9af1cd 100644 > > > --- a/hw/ppc/spapr_pci.c > > > +++ b/hw/ppc/spapr_pci.c > > > @@ -33,8 +33,11 @@ > > > #include > > > #include "trace.h" > > > #include "qemu/error-report.h" > > > +#include "qapi/qmp/qerror.h" > > > =20 > > > #include "hw/pci/pci_bus.h" > > > +#include "hw/ppc/spapr_drc.h" > > > +#include "sysemu/device_tree.h" > > > =20 > > > /* Copied from the kernel arch/powerpc/platforms/pseries/msi.c */ > > > #define RTAS_QUERY_FN 0 > > > @@ -47,7 +50,13 @@ > > > #define RTAS_TYPE_MSI 1 > > > #define RTAS_TYPE_MSIX 2 > > > =20 > > > -#include "hw/ppc/spapr_drc.h" > > > +#define _FDT(exp) \ > > > + do { \ > > > + int ret =3D (exp); = \ > > > + if (ret < 0) { \ > > > + return ret; \ > > > + } \ > > > + } while (0) > > > =20 > > > static sPAPRPHBState *find_phb(sPAPREnvironment *spapr, uint64_t bui= d) > > > { > > > @@ -481,6 +490,359 @@ static AddressSpace *spapr_pci_dma_iommu(PCIBus= *bus, void *opaque, int devfn) > > > return &phb->iommu_as; > > > } > > > =20 > > > +/* Macros to operate with address in OF binding to PCI */ > > > +#define b_x(x, p, l) (((x) & ((1<<(l))-1)) << (p)) > > > +#define b_n(x) b_x((x), 31, 1) /* 0 if relocatable */ > > > +#define b_p(x) b_x((x), 30, 1) /* 1 if prefetchable */ > > > +#define b_t(x) b_x((x), 29, 1) /* 1 if the address is alias= ed */ > > > +#define b_ss(x) b_x((x), 24, 2) /* the space code */ > > > +#define b_bbbbbbbb(x) b_x((x), 16, 8) /* bus number */ > > > +#define b_ddddd(x) b_x((x), 11, 5) /* device number */ > > > +#define b_fff(x) b_x((x), 8, 3) /* function number */ > > > +#define b_rrrrrrrr(x) b_x((x), 0, 8) /* register number */ > > > +/* for 'reg'/'assigned-addresses' OF properties */ > > > +#define RESOURCE_CELLS_SIZE 2 > > > +#define RESOURCE_CELLS_ADDRESS 3 > > > + > > > +typedef struct ResourceFields { > > > + uint32_t phys_hi; > > > + uint32_t phys_mid; > > > + uint32_t phys_lo; > > > + uint32_t size_hi; > > > + uint32_t size_lo; > > > +} ResourceFields; > >=20 > > Hrm, 5*32-bit ints, that probably needs a ((packed)) on at least some > > platforms to be safe. >=20 > I seem to remember some rule (C99?) about padding only being used in cases > where an n-byte field doesn't naturally fall on an n-byte boundary, but > it doesn't hurt to be safe/explicit about what we're expecting. So, the potential problem is end-of-structure padding rather than between-field padding. I know some platforms (ARMs I think) at least used to round structures out to 8 bytes, even if all the members were less than that. Mind you at the time, I believe ((packed)) didn't actually fix it, causing headaches with nested structures. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --uZ3hkaAS1mZxFaxD Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJU7pe8AAoJEGw4ysog2bOSzyQP/ioH7cS9wmB2+HKLAMoA8gsH LrxUZiUD2lGEBTrlwDbfinLcaS2pFI0RLF/896WySJ9iBu2VfY0i+19u0k7xcQzI LDlBnSusPI6iei+GDz7CJjjV1KpmafjbCgl8VNOOK61PT5JPVFSpn/ijCJhLhCyD v9VSCj42FxR4SyGD5tCM8tRZ+USbYHmDoZIPXgqP2lT7t767Ki9aXD4SDcVc9S7Y 2Q/Kxu3H0au0BoCBrars1Fzwo9j1EmELw3f+wKAXkq6ThEXOhfpU40ELIV/KFoxh eVcMXmIo3qbjwh7vOViLpx9XAq9YpGHDLrMOvejiw8wktGw5nksYXd1ePLZcrrLj 9F5ChogxtEVI6mmNgjxAi+hhVuXHtzAz1eDQ1IvYYAsbW7TsIAKHJL3YmGUubY7e RjlWc9BMpWZ/gp9PKDyPt1XMVF7r4+DEd1f45FNghyd3fwUAcKx94rwfYhfVUo0V QmTOxSpoV344vDGOv0duIhLu7Dc35cdhwdKcpsFZaf1Hi8e2LwLdWfJ/uaYbK3b5 u0XNWt/eZT8QFDbFwGwn9H0Qg/dEBEUCflmsapTQNANJLr8BPh2d9WuLBJ2qYN5C GZNhLxXsJ24VfYqLYzuzNmGVVefDapxM95d33Adk5dOZufv0iPtx6J+VS8IKWIgi cp1Ch/TGb5AE34Yojukg =AxmE -----END PGP SIGNATURE----- --uZ3hkaAS1mZxFaxD--