* [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API
@ 2015-02-20 18:22 Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 01/16] pc: acpi-build: create PCI0._CRS dynamically Igor Mammedov
` (15 more replies)
0 siblings, 16 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
NOTE to maintaner:
Needs updating DSDT hex.generated and ACPI tests blobs
Changes since v4:
* split PCI0._CRS patch onto simple ones
* move _CRS into SSDT
* a series to drop manual hole punching in PIIX4 _CRS
* add test case for ACPI table with coldplugged bridge
* fixed up current algorithm rewrite fallout on Q35 machine,
see for detailed changelog in
"pc: acpi-build: simplify PCI bus tree generation"
* fixed minor mst's notes on v4 in PCI patches
Remaining pieces of refactoring PC/Q35 machines to AML API.
There is no more template patching left.
There are TPM and DSDT table blobs left to convert but
that's left for future.
Boot tested with XP3/WS2012R2, correctnes of resource reservation
was checked with WS2012R2 help.
reference to previous iteration:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg280791.html
tree for testing:
https://github.com/imammedo/qemu.git ASL_API_v5
for browsing:
https://github.com/imammedo/qemu/commits/ASL_API_v5
Igor Mammedov (16):
pc: acpi-build: create PCI0._CRS dynamically
pc: acpi: drop manual hole punching for PCI hotplug resources
pc: acpi: drop manual hole punching for CPU hotplug resources
pc: acpi: drop manual hole punching for GPE0 resources
pc: acpi-build: drop remaining ssdt_misc template
acpi: add acpi_irq_no_flags() term
pc: export applesmc IO port/len
pc: acpi-build: drop template patching and create Device(SMC)
dynamically
tests: ACPI test blobs update due to PCI0._CRS changes
tests: bios-tables-test: add support for testing bridges
tests: add ACPI blobs for qemu with bridge cases
pc: acpi-build: simplify PCI bus tree generation
tests: ACPI: update pc/SSDT.bridge due to new alg of PCI tree creation
pc: acpi-build: drop template patching and create PCI bus tree
dynamically
pc: acpi: remove not used anymore ssdt-[misc|pcihp].hex.generated
blobs
acpi: make build_*() routines static to aml-build.c
hw/acpi/aml-build.c | 41 ++-
hw/i386/Makefile.objs | 2 -
hw/i386/acpi-build.c | 491 ++++++++++++-----------------------
hw/i386/acpi-dsdt-isa.dsl | 11 -
hw/i386/acpi-dsdt-pci-crs.dsl | 92 -------
hw/i386/acpi-dsdt.dsl | 46 ----
hw/i386/q35-acpi-dsdt.dsl | 19 --
hw/i386/ssdt-misc.dsl | 40 ---
hw/i386/ssdt-misc.hex.generated | 139 ----------
hw/i386/ssdt-pcihp.dsl | 100 -------
hw/i386/ssdt-pcihp.hex.generated | 251 ------------------
hw/misc/applesmc.c | 5 +-
include/hw/acpi/aml-build.h | 17 +-
include/hw/isa/isa.h | 11 +-
tests/acpi-test-data/pc/DSDT | Bin 3415 -> 2970 bytes
tests/acpi-test-data/pc/SSDT | Bin 2374 -> 2480 bytes
tests/acpi-test-data/pc/SSDT.bridge | Bin 0 -> 4351 bytes
tests/acpi-test-data/q35/DSDT | Bin 8005 -> 7608 bytes
tests/acpi-test-data/q35/SSDT | Bin 578 -> 685 bytes
tests/acpi-test-data/q35/SSDT.bridge | Bin 0 -> 702 bytes
tests/bios-tables-test.c | 45 +++-
21 files changed, 250 insertions(+), 1060 deletions(-)
delete mode 100644 hw/i386/acpi-dsdt-pci-crs.dsl
delete mode 100644 hw/i386/ssdt-misc.dsl
delete mode 100644 hw/i386/ssdt-misc.hex.generated
delete mode 100644 hw/i386/ssdt-pcihp.dsl
delete mode 100644 hw/i386/ssdt-pcihp.hex.generated
create mode 100644 tests/acpi-test-data/pc/SSDT.bridge
create mode 100644 tests/acpi-test-data/q35/SSDT.bridge
--
1.8.3.1
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 01/16] pc: acpi-build: create PCI0._CRS dynamically
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 02/16] pc: acpi: drop manual hole punching for PCI hotplug resources Igor Mammedov
` (14 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
Replace template patching and runtime calculation
in _CRS() method with static _CRS defined in SSDT.
No functional change except of as mentined above
and _CRS being moved from DSDT to SSDT.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/i386/acpi-build.c | 88 ++++++++++++++++++++++++-----------------
hw/i386/acpi-dsdt-pci-crs.dsl | 92 -------------------------------------------
hw/i386/acpi-dsdt.dsl | 45 ---------------------
hw/i386/q35-acpi-dsdt.dsl | 18 ---------
hw/i386/ssdt-misc.dsl | 19 ---------
5 files changed, 52 insertions(+), 210 deletions(-)
delete mode 100644 hw/i386/acpi-dsdt-pci-crs.dsl
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 4d5d7e3..355f9b7 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -346,24 +346,6 @@ static void acpi_align_size(GArray *blob, unsigned align)
g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align));
}
-/* Set a value within table in a safe manner */
-#define ACPI_BUILD_SET_LE(table, size, off, bits, val) \
- do { \
- uint64_t ACPI_BUILD_SET_LE_val = cpu_to_le64(val); \
- memcpy(acpi_data_get_ptr(table, size, off, \
- (bits) / BITS_PER_BYTE), \
- &ACPI_BUILD_SET_LE_val, \
- (bits) / BITS_PER_BYTE); \
- } while (0)
-
-static inline void *acpi_data_get_ptr(uint8_t *table_data, unsigned table_size,
- unsigned off, unsigned size)
-{
- assert(off + size > off);
- assert(off + size <= table_size);
- return table_data + off;
-}
-
static inline void acpi_add_table(GArray *table_offsets, GArray *table_data)
{
uint32_t offset = cpu_to_le32(table_data->len);
@@ -860,22 +842,6 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state)
g_free(child);
}
-static void patch_pci_windows(PcPciInfo *pci, uint8_t *start, unsigned size)
-{
- ACPI_BUILD_SET_LE(start, size, acpi_pci32_start[0], 32, pci->w32.begin);
-
- ACPI_BUILD_SET_LE(start, size, acpi_pci32_end[0], 32, pci->w32.end - 1);
-
- if (pci->w64.end || pci->w64.begin) {
- ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 1);
- ACPI_BUILD_SET_LE(start, size, acpi_pci64_start[0], 64, pci->w64.begin);
- ACPI_BUILD_SET_LE(start, size, acpi_pci64_end[0], 64, pci->w64.end - 1);
- ACPI_BUILD_SET_LE(start, size, acpi_pci64_length[0], 64, pci->w64.end - pci->w64.begin);
- } else {
- ACPI_BUILD_SET_LE(start, size, acpi_pci64_valid[0], 8, 0);
- }
-}
-
static void
build_ssdt(GArray *table_data, GArray *linker,
AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc,
@@ -898,9 +864,59 @@ build_ssdt(GArray *table_data, GArray *linker,
ssdt_ptr = acpi_data_push(ssdt->buf, sizeof(ssdp_misc_aml));
memcpy(ssdt_ptr, ssdp_misc_aml, sizeof(ssdp_misc_aml));
- patch_pci_windows(pci, ssdt_ptr, sizeof(ssdp_misc_aml));
-
scope = aml_scope("\\_SB.PCI0");
+ /* build PCI0._CRS */
+ crs = aml_resource_template();
+ aml_append(crs,
+ aml_word_bus_number(aml_min_fixed, aml_max_fixed, aml_pos_decode,
+ 0x0000, 0x0000, 0x00FF, 0x0000, 0x0100));
+ aml_append(crs, aml_io(aml_decode16, 0x0CF8, 0x0CF8, 0x01, 0x08));
+
+ aml_append(crs,
+ aml_word_io(aml_min_fixed, aml_max_fixed,
+ aml_pos_decode, aml_entire_range,
+ 0x0000, 0x0000, 0x0CF7, 0x0000, 0x0CF8));
+ if (ich9_lpc_find()) { /* Q35 */
+ aml_append(crs,
+ aml_word_io(aml_min_fixed, aml_max_fixed,
+ aml_pos_decode, aml_entire_range,
+ 0x0000, 0x0D00, 0xFFFF, 0x0000, 0xF300));
+ } else { /* piix4 */
+ aml_append(crs,
+ aml_word_io(aml_min_fixed, aml_max_fixed,
+ aml_pos_decode, aml_entire_range,
+ 0x0000, 0x0D00, 0xADFF, 0x0000, 0xA100));
+ aml_append(crs,
+ aml_word_io(aml_min_fixed, aml_max_fixed,
+ aml_pos_decode, aml_entire_range,
+ 0x0000, 0xAE0F, 0xAEFF, 0x0000, 0x00F1));
+ aml_append(crs,
+ aml_word_io(aml_min_fixed, aml_max_fixed,
+ aml_pos_decode, aml_entire_range,
+ 0x0000, 0xAF20, 0xAFDF, 0x0000, 0x00C0));
+ aml_append(crs,
+ aml_word_io(aml_min_fixed, aml_max_fixed,
+ aml_pos_decode, aml_entire_range,
+ 0x0000, 0xAFE4, 0xFFFF, 0x0000, 0x501C));
+ }
+ aml_append(crs,
+ aml_dword_memory(aml_pos_decode, aml_min_fixed, aml_max_fixed,
+ aml_cacheable, aml_ReadWrite,
+ 0, 0x000A0000, 0x000BFFFF, 0, 0x00020000));
+ aml_append(crs,
+ aml_dword_memory(aml_pos_decode, aml_min_fixed, aml_max_fixed,
+ aml_non_cacheable, aml_ReadWrite,
+ 0, pci->w32.begin, pci->w32.end - 1, 0,
+ pci->w32.end - pci->w32.begin));
+ if (pci->w64.begin) {
+ aml_append(crs,
+ aml_qword_memory(aml_pos_decode, aml_min_fixed, aml_max_fixed,
+ aml_cacheable, aml_ReadWrite,
+ 0, pci->w64.begin, pci->w64.end - 1, 0,
+ pci->w64.end - pci->w64.begin));
+ }
+ aml_append(scope, aml_name_decl("_CRS", crs));
+
/* reserve PCIHP resources */
if (pm->pcihp_io_len) {
dev = aml_device("PHPR");
diff --git a/hw/i386/acpi-dsdt-pci-crs.dsl b/hw/i386/acpi-dsdt-pci-crs.dsl
deleted file mode 100644
index 4648e90..0000000
--- a/hw/i386/acpi-dsdt-pci-crs.dsl
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, see <http://www.gnu.org/licenses/>.
- */
-
-/* PCI CRS (current resources) definition. */
-Scope(\_SB.PCI0) {
-
- Name(CRES, ResourceTemplate() {
- WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode,
- 0x0000, // Address Space Granularity
- 0x0000, // Address Range Minimum
- 0x00FF, // Address Range Maximum
- 0x0000, // Address Translation Offset
- 0x0100, // Address Length
- ,, )
- IO(Decode16,
- 0x0CF8, // Address Range Minimum
- 0x0CF8, // Address Range Maximum
- 0x01, // Address Alignment
- 0x08, // Address Length
- )
- BOARD_SPECIFIC_PCI_RESOURSES
- DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0x00000000, // Address Space Granularity
- 0x000A0000, // Address Range Minimum
- 0x000BFFFF, // Address Range Maximum
- 0x00000000, // Address Translation Offset
- 0x00020000, // Address Length
- ,, , AddressRangeMemory, TypeStatic)
- DWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
- 0x00000000, // Address Space Granularity
- 0xE0000000, // Address Range Minimum
- 0xFEBFFFFF, // Address Range Maximum
- 0x00000000, // Address Translation Offset
- 0x1EC00000, // Address Length
- ,, PW32, AddressRangeMemory, TypeStatic)
- })
-
- Name(CR64, ResourceTemplate() {
- QWordMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0x00000000, // Address Space Granularity
- 0x8000000000, // Address Range Minimum
- 0xFFFFFFFFFF, // Address Range Maximum
- 0x00000000, // Address Translation Offset
- 0x8000000000, // Address Length
- ,, PW64, AddressRangeMemory, TypeStatic)
- })
-
- Method(_CRS, 0) {
- /* Fields provided by dynamically created ssdt */
- External(P0S, IntObj)
- External(P0E, IntObj)
- External(P1V, IntObj)
- External(P1S, BuffObj)
- External(P1E, BuffObj)
- External(P1L, BuffObj)
-
- /* fixup 32bit pci io window */
- CreateDWordField(CRES, \_SB.PCI0.PW32._MIN, PS32)
- CreateDWordField(CRES, \_SB.PCI0.PW32._MAX, PE32)
- CreateDWordField(CRES, \_SB.PCI0.PW32._LEN, PL32)
- Store(P0S, PS32)
- Store(P0E, PE32)
- Store(Add(Subtract(P0E, P0S), 1), PL32)
-
- If (LEqual(P1V, Zero)) {
- Return (CRES)
- }
-
- /* fixup 64bit pci io window */
- CreateQWordField(CR64, \_SB.PCI0.PW64._MIN, PS64)
- CreateQWordField(CR64, \_SB.PCI0.PW64._MAX, PE64)
- CreateQWordField(CR64, \_SB.PCI0.PW64._LEN, PL64)
- Store(P1S, PS64)
- Store(P1E, PE64)
- Store(P1L, PL64)
- /* add window and return result */
- ConcatenateResTemplate(CRES, CR64, Local0)
- Return (Local0)
- }
-}
diff --git a/hw/i386/acpi-dsdt.dsl b/hw/i386/acpi-dsdt.dsl
index a611e07..09b68f0 100644
--- a/hw/i386/acpi-dsdt.dsl
+++ b/hw/i386/acpi-dsdt.dsl
@@ -31,50 +31,6 @@ DefinitionBlock (
#include "acpi-dsdt-dbug.dsl"
-
-/****************************************************************
- * PCI Bus definition
- ****************************************************************/
-#define BOARD_SPECIFIC_PCI_RESOURSES \
- WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
- 0x0000, \
- 0x0000, \
- 0x0CF7, \
- 0x0000, \
- 0x0CF8, \
- ,, , TypeStatic) \
- WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
- 0x0000, \
- 0x0D00, \
- 0xADFF, \
- 0x0000, \
- 0xA100, \
- ,, , TypeStatic) \
- /* 0xae00-0xae0e hole for PCI hotplug, hw/acpi/piix4.c:PCI_HOTPLUG_ADDR */ \
- WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
- 0x0000, \
- 0xAE0F, \
- 0xAEFF, \
- 0x0000, \
- 0x00F1, \
- ,, , TypeStatic) \
- /* 0xaf00-0xaf1f hole for CPU hotplug, hw/acpi/piix4.c:PIIX4_PROC_BASE */ \
- WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
- 0x0000, \
- 0xAF20, \
- 0xAFDF, \
- 0x0000, \
- 0x00C0, \
- ,, , TypeStatic) \
- /* 0xafe0-0xafe3 hole for ACPI.GPE0, hw/acpi/piix4.c:GPE_BASE */ \
- WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
- 0x0000, \
- 0xAFE4, \
- 0xFFFF, \
- 0x0000, \
- 0x501C, \
- ,, , TypeStatic)
-
Scope(\_SB) {
Device(PCI0) {
Name(_HID, EisaId("PNP0A03"))
@@ -85,7 +41,6 @@ DefinitionBlock (
}
}
-#include "acpi-dsdt-pci-crs.dsl"
#include "acpi-dsdt-hpet.dsl"
diff --git a/hw/i386/q35-acpi-dsdt.dsl b/hw/i386/q35-acpi-dsdt.dsl
index e1cee5d..3fb4b2f 100644
--- a/hw/i386/q35-acpi-dsdt.dsl
+++ b/hw/i386/q35-acpi-dsdt.dsl
@@ -48,23 +48,6 @@ DefinitionBlock (
/****************************************************************
* PCI Bus definition
****************************************************************/
-#define BOARD_SPECIFIC_PCI_RESOURSES \
- WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
- 0x0000, \
- 0x0000, \
- 0x0CD7, \
- 0x0000, \
- 0x0CD8, \
- ,, , TypeStatic) \
- /* 0xcd8-0xcf7 hole for CPU hotplug, hw/acpi/ich9.c:ICH9_PROC_BASE */ \
- WordIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, \
- 0x0000, \
- 0x0D00, \
- 0xFFFF, \
- 0x0000, \
- 0xF300, \
- ,, , TypeStatic)
-
Scope(\_SB) {
Device(PCI0) {
Name(_HID, EisaId("PNP0A08"))
@@ -131,7 +114,6 @@ DefinitionBlock (
}
}
-#include "acpi-dsdt-pci-crs.dsl"
#include "acpi-dsdt-hpet.dsl"
diff --git a/hw/i386/ssdt-misc.dsl b/hw/i386/ssdt-misc.dsl
index 2588e30..8d61f21 100644
--- a/hw/i386/ssdt-misc.dsl
+++ b/hw/i386/ssdt-misc.dsl
@@ -18,23 +18,4 @@ ACPI_EXTRACT_ALL_CODE ssdp_misc_aml
DefinitionBlock ("ssdt-misc.aml", "SSDT", 0x01, "BXPC", "BXSSDTSUSP", 0x1)
{
-
-/****************************************************************
- * PCI memory ranges
- ****************************************************************/
-
- Scope(\) {
- ACPI_EXTRACT_NAME_DWORD_CONST acpi_pci32_start
- Name(P0S, 0x12345678)
- ACPI_EXTRACT_NAME_DWORD_CONST acpi_pci32_end
- Name(P0E, 0x12345678)
- ACPI_EXTRACT_NAME_BYTE_CONST acpi_pci64_valid
- Name(P1V, 0x12)
- ACPI_EXTRACT_NAME_BUFFER8 acpi_pci64_start
- Name(P1S, Buffer() { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 })
- ACPI_EXTRACT_NAME_BUFFER8 acpi_pci64_end
- Name(P1E, Buffer() { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 })
- ACPI_EXTRACT_NAME_BUFFER8 acpi_pci64_length
- Name(P1L, Buffer() { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 })
- }
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 02/16] pc: acpi: drop manual hole punching for PCI hotplug resources
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 01/16] pc: acpi-build: create PCI0._CRS dynamically Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 03/16] pc: acpi: drop manual hole punching for CPU " Igor Mammedov
` (13 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
Drops manual hole punching in PCI0._CRS for PIIX4 machine type.
Resources will be consumed by Device(PHPR) that cwis attached
to PCI bus. The same way how it currently works for mem hotlpug.
Manual hole in PIIX4 _CRS wasn't correct anyway since it was
legacy size 0xF while current PCIHP MMIO region is of size 0x14.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/i386/acpi-build.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 355f9b7..02e2597 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -885,11 +885,7 @@ build_ssdt(GArray *table_data, GArray *linker,
aml_append(crs,
aml_word_io(aml_min_fixed, aml_max_fixed,
aml_pos_decode, aml_entire_range,
- 0x0000, 0x0D00, 0xADFF, 0x0000, 0xA100));
- aml_append(crs,
- aml_word_io(aml_min_fixed, aml_max_fixed,
- aml_pos_decode, aml_entire_range,
- 0x0000, 0xAE0F, 0xAEFF, 0x0000, 0x00F1));
+ 0x0000, 0x0D00, 0xAEFF, 0x0000, 0xA200));
aml_append(crs,
aml_word_io(aml_min_fixed, aml_max_fixed,
aml_pos_decode, aml_entire_range,
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 03/16] pc: acpi: drop manual hole punching for CPU hotplug resources
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 01/16] pc: acpi-build: create PCI0._CRS dynamically Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 02/16] pc: acpi: drop manual hole punching for PCI hotplug resources Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 04/16] pc: acpi: drop manual hole punching for GPE0 resources Igor Mammedov
` (12 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
Drops manual hole punching in PCI0._CRS on PIIX4 machine type
for CPU hotplug resources.
Resources will be consumed by Device(PRES) that is attached
to PCI bus. The same way how it currently works for mem hotlpug.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/i386/acpi-build.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 02e2597..0de261a 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -885,11 +885,7 @@ build_ssdt(GArray *table_data, GArray *linker,
aml_append(crs,
aml_word_io(aml_min_fixed, aml_max_fixed,
aml_pos_decode, aml_entire_range,
- 0x0000, 0x0D00, 0xAEFF, 0x0000, 0xA200));
- aml_append(crs,
- aml_word_io(aml_min_fixed, aml_max_fixed,
- aml_pos_decode, aml_entire_range,
- 0x0000, 0xAF20, 0xAFDF, 0x0000, 0x00C0));
+ 0x0000, 0x0D00, 0xAFDF, 0x0000, 0xA2E0));
aml_append(crs,
aml_word_io(aml_min_fixed, aml_max_fixed,
aml_pos_decode, aml_entire_range,
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 04/16] pc: acpi: drop manual hole punching for GPE0 resources
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (2 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 03/16] pc: acpi: drop manual hole punching for CPU " Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 05/16] pc: acpi-build: drop remaining ssdt_misc template Igor Mammedov
` (11 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
Drops manual hole punching in PCI0._CRS on PIIX4 machine type
for GPE0 resources. Resources will be consumed by Device(GPE0)
that is attached to PCI namespace.
There is GPE device with HID ACPI0006 since ACPI2.0
that should be used for this purpose but none of Windows
versions support it and show it as "unknown device",
so reserve resource in old fashioned way with PNP0A06
device to make windows happy and actually reserve resources.
Along with last hole _CRS layout of PIIX4 machine becomes
the same as Q35 one, so merge them together and use the same
_CRS for both machine types.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/i386/acpi-build.c | 32 +++++++++++++++++---------------
1 file changed, 17 insertions(+), 15 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 0de261a..2700154 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -876,21 +876,10 @@ build_ssdt(GArray *table_data, GArray *linker,
aml_word_io(aml_min_fixed, aml_max_fixed,
aml_pos_decode, aml_entire_range,
0x0000, 0x0000, 0x0CF7, 0x0000, 0x0CF8));
- if (ich9_lpc_find()) { /* Q35 */
- aml_append(crs,
- aml_word_io(aml_min_fixed, aml_max_fixed,
- aml_pos_decode, aml_entire_range,
- 0x0000, 0x0D00, 0xFFFF, 0x0000, 0xF300));
- } else { /* piix4 */
- aml_append(crs,
- aml_word_io(aml_min_fixed, aml_max_fixed,
- aml_pos_decode, aml_entire_range,
- 0x0000, 0x0D00, 0xAFDF, 0x0000, 0xA2E0));
- aml_append(crs,
- aml_word_io(aml_min_fixed, aml_max_fixed,
- aml_pos_decode, aml_entire_range,
- 0x0000, 0xAFE4, 0xFFFF, 0x0000, 0x501C));
- }
+ aml_append(crs,
+ aml_word_io(aml_min_fixed, aml_max_fixed,
+ aml_pos_decode, aml_entire_range,
+ 0x0000, 0x0D00, 0xFFFF, 0x0000, 0xF300));
aml_append(crs,
aml_dword_memory(aml_pos_decode, aml_min_fixed, aml_max_fixed,
aml_cacheable, aml_ReadWrite,
@@ -909,6 +898,19 @@ build_ssdt(GArray *table_data, GArray *linker,
}
aml_append(scope, aml_name_decl("_CRS", crs));
+ /* reserve GPE0 block resources */
+ dev = aml_device("GPE0");
+ aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
+ aml_append(dev, aml_name_decl("_UID", aml_string("GPE0 resources")));
+ /* device present, functioning, decoding, not shown in UI */
+ aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
+ crs = aml_resource_template();
+ aml_append(crs,
+ aml_io(aml_decode16, pm->gpe0_blk, pm->gpe0_blk, 1, pm->gpe0_blk_len)
+ );
+ aml_append(dev, aml_name_decl("_CRS", crs));
+ aml_append(scope, dev);
+
/* reserve PCIHP resources */
if (pm->pcihp_io_len) {
dev = aml_device("PHPR");
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 05/16] pc: acpi-build: drop remaining ssdt_misc template
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (3 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 04/16] pc: acpi: drop manual hole punching for GPE0 resources Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 06/16] acpi: add acpi_irq_no_flags() term Igor Mammedov
` (10 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
It drops empty ssdt_misc templete. It also hides
from user almost all pointer arithmetic when building
SSDT which makes resulting code a bit cleaner
and concentrating only on composing ASL construct
/i.e. a task build_ssdt() should be doing/.
Also it makes one binary blob less stored in QEMU
source tree by removing need to keep and update
hw/i386/ssdt-misc.hex.generated file here in total
saving us ~430LOC.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/i386/Makefile.objs | 1 -
hw/i386/acpi-build.c | 7 ++-----
hw/i386/ssdt-misc.dsl | 21 ---------------------
3 files changed, 2 insertions(+), 27 deletions(-)
delete mode 100644 hw/i386/ssdt-misc.dsl
diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
index 45b90a8..9b00568 100644
--- a/hw/i386/Makefile.objs
+++ b/hw/i386/Makefile.objs
@@ -10,7 +10,6 @@ obj-y += acpi-build.o
hw/i386/acpi-build.o: hw/i386/acpi-build.c \
hw/i386/acpi-dsdt.hex hw/i386/q35-acpi-dsdt.hex \
hw/i386/ssdt-pcihp.hex \
- hw/i386/ssdt-misc.hex \
hw/i386/ssdt-tpm.hex
iasl-option=$(shell if test -z "`$(1) $(2) 2>&1 > /dev/null`" \
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 2700154..01d988c 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -526,7 +526,6 @@ static inline char acpi_get_hex(uint32_t val)
#define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */
#define ACPI_SSDT_HEADER_LENGTH 36
-#include "hw/i386/ssdt-misc.hex"
#include "hw/i386/ssdt-pcihp.hex"
#include "hw/i386/ssdt-tpm.hex"
@@ -850,7 +849,6 @@ build_ssdt(GArray *table_data, GArray *linker,
MachineState *machine = MACHINE(qdev_get_machine());
uint32_t nr_mem = machine->ram_slots;
unsigned acpi_cpus = guest_info->apic_id_limit;
- uint8_t *ssdt_ptr;
Aml *ssdt, *sb_scope, *scope, *pkg, *dev, *method, *crs, *field, *ifctx;
int i;
@@ -860,9 +858,8 @@ build_ssdt(GArray *table_data, GArray *linker,
QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
g_assert(acpi_cpus <= ACPI_CPU_HOTPLUG_ID_LIMIT);
- /* Copy header and patch values in the S3_ / S4_ / S5_ packages */
- ssdt_ptr = acpi_data_push(ssdt->buf, sizeof(ssdp_misc_aml));
- memcpy(ssdt_ptr, ssdp_misc_aml, sizeof(ssdp_misc_aml));
+ /* Reserve space for header */
+ acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader));
scope = aml_scope("\\_SB.PCI0");
/* build PCI0._CRS */
diff --git a/hw/i386/ssdt-misc.dsl b/hw/i386/ssdt-misc.dsl
deleted file mode 100644
index 8d61f21..0000000
--- a/hw/i386/ssdt-misc.dsl
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, see <http://www.gnu.org/licenses/>.
- */
-#include "hw/acpi/pc-hotplug.h"
-
-ACPI_EXTRACT_ALL_CODE ssdp_misc_aml
-
-DefinitionBlock ("ssdt-misc.aml", "SSDT", 0x01, "BXPC", "BXSSDTSUSP", 0x1)
-{
-}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 06/16] acpi: add acpi_irq_no_flags() term
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (4 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 05/16] pc: acpi-build: drop remaining ssdt_misc template Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 07/16] pc: export applesmc IO port/len Igor Mammedov
` (9 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/acpi/aml-build.c | 21 +++++++++++++++++++++
include/hw/acpi/aml-build.h | 1 +
2 files changed, 22 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index d793775..60245e7 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -514,6 +514,27 @@ Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
return var;
}
+/*
+ * ACPI 1.0b: 6.4.2.1.1 ASL Macro for IRQ Descriptor
+ *
+ * More verbose description at:
+ * ACPI 5.0: 19.5.64 IRQNoFlags (Interrupt Resource Descriptor Macro)
+ * 6.4.2.1 IRQ Descriptor
+ */
+Aml *aml_irq_no_flags(uint8_t irq)
+{
+ uint16_t irq_mask;
+ Aml *var = aml_alloc();
+
+ assert(irq < 16);
+ build_append_byte(var->buf, 0x22); /* IRQ descriptor 2 byte form */
+
+ irq_mask = 1U << irq;
+ build_append_byte(var->buf, irq_mask & 0xFF); /* IRQ mask bits[7:0] */
+ build_append_byte(var->buf, irq_mask >> 8); /* IRQ mask bits[15:8] */
+ return var;
+}
+
/* ACPI 1.0b: 16.2.5.4 Type 2 Opcodes Encoding: DefLEqual */
Aml *aml_equal(Aml *arg1, Aml *arg2)
{
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index d2b2c35..1187197 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -146,6 +146,7 @@ Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
uint8_t aln, uint8_t len);
Aml *aml_operation_region(const char *name, AmlRegionSpace rs,
uint32_t offset, uint32_t len);
+Aml *aml_irq_no_flags(uint8_t irq);
Aml *aml_named_field(const char *name, unsigned length);
Aml *aml_reserved_field(unsigned length);
Aml *aml_local(int num);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 07/16] pc: export applesmc IO port/len
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (5 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 06/16] acpi: add acpi_irq_no_flags() term Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 08/16] pc: acpi-build: drop template patching and create Device(SMC) dynamically Igor Mammedov
` (8 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
IO port and length will be used in following patch
to correctly generate SMC ACPI device in SSDT.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/i386/acpi-build.c | 2 +-
hw/misc/applesmc.c | 5 ++---
include/hw/isa/isa.h | 11 +++++++++--
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 01d988c..badfa73 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -145,7 +145,7 @@ static void acpi_get_dsdt(AcpiMiscInfo *info)
/* Patch in appropriate value for AppleSMC _STA */
*(uint8_t *)(info->dsdt_code + *applesmc_sta) =
- applesmc_find() ? 0x0b : 0x00;
+ applesmc_port() ? 0x0b : 0x00;
}
static
diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c
index 6a56b07..6bd61e7 100644
--- a/hw/misc/applesmc.c
+++ b/hw/misc/applesmc.c
@@ -43,7 +43,6 @@
/* command/status port used by Apple SMC */
#define APPLESMC_CMD_PORT 0x4
#define APPLESMC_NR_PORTS 32
-#define APPLESMC_MAX_DATA_LENGTH 32
#define APPLESMC_READ_CMD 0x10
#define APPLESMC_WRITE_CMD 0x11
@@ -249,8 +248,8 @@ static void applesmc_isa_realize(DeviceState *dev, Error **errp)
}
static Property applesmc_isa_properties[] = {
- DEFINE_PROP_UINT32("iobase", AppleSMCState, iobase,
- APPLESMC_DEFAULT_IOBASE),
+ DEFINE_PROP_UINT32(APPLESMC_PROP_IO_BASE, AppleSMCState, iobase,
+ APPLESMC_DEFAULT_IOBASE),
DEFINE_PROP_STRING("osk", AppleSMCState, osk),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h
index e0c749f..1ee9fa0 100644
--- a/include/hw/isa/isa.h
+++ b/include/hw/isa/isa.h
@@ -21,10 +21,17 @@
#define ISA_BUS(obj) OBJECT_CHECK(ISABus, (obj), TYPE_ISA_BUS)
#define TYPE_APPLE_SMC "isa-applesmc"
+#define APPLESMC_MAX_DATA_LENGTH 32
+#define APPLESMC_PROP_IO_BASE "iobase"
-static inline bool applesmc_find(void)
+static inline uint16_t applesmc_port(void)
{
- return object_resolve_path_type("", TYPE_APPLE_SMC, NULL);
+ Object *obj = object_resolve_path_type("", TYPE_APPLE_SMC, NULL);
+
+ if (obj) {
+ return object_property_get_int(obj, APPLESMC_PROP_IO_BASE, NULL);
+ }
+ return 0;
}
typedef struct ISADeviceClass {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 08/16] pc: acpi-build: drop template patching and create Device(SMC) dynamically
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (6 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 07/16] pc: export applesmc IO port/len Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-26 16:33 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 09/16] tests: ACPI test blobs update due to PCI0._CRS changes Igor Mammedov
` (7 subsequent siblings)
15 siblings, 1 reply; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
patch moves SMC device into SSDT and creates it only
when device is present, which makes ACPI tables smaller
in default case when device is not present.
Also it fixes wrong IO range in CRS if "iobase"
property is set to a non default value.
PS:
Testing with XP shows that current default "iobase"
used SMC device conflicts with floppy controller IO,
but it's topic for another patch and I'd leave it
to SMC device author for resolving conflict.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
CC: agraf@suse.de
---
hw/i386/acpi-build.c | 29 ++++++++++++++++++++++-------
hw/i386/acpi-dsdt-isa.dsl | 11 -----------
hw/i386/acpi-dsdt.dsl | 1 -
hw/i386/q35-acpi-dsdt.dsl | 1 -
4 files changed, 22 insertions(+), 20 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index badfa73..05eb80a 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -116,6 +116,7 @@ typedef struct AcpiMiscInfo {
const unsigned char *dsdt_code;
unsigned dsdt_size;
uint16_t pvpanic_port;
+ uint16_t applesmc_io_base;
} AcpiMiscInfo;
typedef struct AcpiBuildPciBusHotplugState {
@@ -127,7 +128,6 @@ typedef struct AcpiBuildPciBusHotplugState {
static void acpi_get_dsdt(AcpiMiscInfo *info)
{
- uint16_t *applesmc_sta;
Object *piix = piix4_pm_find();
Object *lpc = ich9_lpc_find();
assert(!!piix != !!lpc);
@@ -135,17 +135,11 @@ static void acpi_get_dsdt(AcpiMiscInfo *info)
if (piix) {
info->dsdt_code = AcpiDsdtAmlCode;
info->dsdt_size = sizeof AcpiDsdtAmlCode;
- applesmc_sta = piix_dsdt_applesmc_sta;
}
if (lpc) {
info->dsdt_code = Q35AcpiDsdtAmlCode;
info->dsdt_size = sizeof Q35AcpiDsdtAmlCode;
- applesmc_sta = q35_dsdt_applesmc_sta;
}
-
- /* Patch in appropriate value for AppleSMC _STA */
- *(uint8_t *)(info->dsdt_code + *applesmc_sta) =
- applesmc_port() ? 0x0b : 0x00;
}
static
@@ -248,6 +242,7 @@ static void acpi_get_misc_info(AcpiMiscInfo *info)
info->has_hpet = hpet_find();
info->has_tpm = tpm_find();
info->pvpanic_port = pvpanic_port();
+ info->applesmc_io_base = applesmc_port();
}
static void acpi_get_pci_info(PcPciInfo *info)
@@ -955,6 +950,26 @@ build_ssdt(GArray *table_data, GArray *linker,
aml_append(scope, aml_name_decl("_S5", pkg));
aml_append(ssdt, scope);
+ if (misc->applesmc_io_base) {
+ scope = aml_scope("\\_SB.PCI0.ISA");
+ dev = aml_device("SMC");
+
+ aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0001")));
+ /* device present, functioning, decoding, not shown in UI */
+ aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
+
+ crs = aml_resource_template();
+ aml_append(crs,
+ aml_io(aml_decode16, misc->applesmc_io_base, misc->applesmc_io_base,
+ 0x01, APPLESMC_MAX_DATA_LENGTH)
+ );
+ aml_append(crs, aml_irq_no_flags(6));
+ aml_append(dev, aml_name_decl("_CRS", crs));
+
+ aml_append(scope, dev);
+ aml_append(ssdt, scope);
+ }
+
if (misc->pvpanic_port) {
scope = aml_scope("\\_SB.PCI0.ISA");
diff --git a/hw/i386/acpi-dsdt-isa.dsl b/hw/i386/acpi-dsdt-isa.dsl
index deb37de..89caa16 100644
--- a/hw/i386/acpi-dsdt-isa.dsl
+++ b/hw/i386/acpi-dsdt-isa.dsl
@@ -16,17 +16,6 @@
/* Common legacy ISA style devices. */
Scope(\_SB.PCI0.ISA) {
- Device (SMC) {
- Name(_HID, EisaId("APP0001"))
- /* _STA will be patched to 0x0B if AppleSMC is present */
- ACPI_EXTRACT_NAME_BYTE_CONST DSDT_APPLESMC_STA
- Name(_STA, 0xF0)
- Name(_CRS, ResourceTemplate () {
- IO (Decode16, 0x0300, 0x0300, 0x01, 0x20)
- IRQNoFlags() { 6 }
- })
- }
-
Device(RTC) {
Name(_HID, EisaId("PNP0B00"))
Name(_CRS, ResourceTemplate() {
diff --git a/hw/i386/acpi-dsdt.dsl b/hw/i386/acpi-dsdt.dsl
index 09b68f0..a2d84ec 100644
--- a/hw/i386/acpi-dsdt.dsl
+++ b/hw/i386/acpi-dsdt.dsl
@@ -85,7 +85,6 @@ DefinitionBlock (
}
}
-#define DSDT_APPLESMC_STA piix_dsdt_applesmc_sta
#include "acpi-dsdt-isa.dsl"
diff --git a/hw/i386/q35-acpi-dsdt.dsl b/hw/i386/q35-acpi-dsdt.dsl
index 3fb4b2f..16eaca3 100644
--- a/hw/i386/q35-acpi-dsdt.dsl
+++ b/hw/i386/q35-acpi-dsdt.dsl
@@ -150,7 +150,6 @@ DefinitionBlock (
}
}
-#define DSDT_APPLESMC_STA q35_dsdt_applesmc_sta
#include "acpi-dsdt-isa.dsl"
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 09/16] tests: ACPI test blobs update due to PCI0._CRS changes
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (7 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 08/16] pc: acpi-build: drop template patching and create Device(SMC) dynamically Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 10/16] tests: bios-tables-test: add support for testing bridges Igor Mammedov
` (6 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
PCI0._CRS was moved into SSDT and became the same for
PIIX4/Q35 machines.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
tests/acpi-test-data/pc/DSDT | Bin 3415 -> 2970 bytes
tests/acpi-test-data/pc/SSDT | Bin 2374 -> 2480 bytes
tests/acpi-test-data/q35/DSDT | Bin 8005 -> 7608 bytes
tests/acpi-test-data/q35/SSDT | Bin 578 -> 685 bytes
4 files changed, 0 insertions(+), 0 deletions(-)
diff --git a/tests/acpi-test-data/pc/DSDT b/tests/acpi-test-data/pc/DSDT
index ad12cb35d9dafc4d50002873f5c4ca04552b36df..1693c3783b34cfb5473e7ef65ba6f8deee390898 100644
GIT binary patch
delta 45
zcmcaEHA|e!CD<io7B>R}W5h(Rj?Icp+>8P~()!Ht!A|i3&YlLI!H)5pvzXs<0ss&x
B3^@P*
delta 471
zcmX|;PfG$p7{=dmA=YWu6e24^q(i4D|FOqtT^BPf21n}9Vf+XZ5qMG}P$DSt5*?zz
zt4j0%@>_JQL)Q+S^3*i1+xi}6e$Vp^54_BM{B4yMM4@_Y0g&@9?KBUUx1`8R?v_%f
zTk%9JPw7L)f)E27g$F5;37artYM(Fztsfmv*i2h$pv|X1FAUWX;2Q#+9KDYK#xwmn
zQo4AJx8pW|UkE@!sd?<y6M}YJC&X9qq15ZI&*MY`Ot%*auQXfQQ8@pvf(!iyEIL%W
z6#-Yc6}{#noAL3Mdja0@ayC=vDIqb|;7JVYr)N{tJ`lh+kF3YjM-uv2cH>s;9E~_!
z*g2n<xEJ6CFWb2~Ph;g2uyP7ziP0rCU_q^4d+su_v!B>Df*&XeN1j}4iUU`ga<5ci
gb5S6s6jg_UiQB}Y)G87%z#z%>UA^VYfP97j0NTcIKL7v#
diff --git a/tests/acpi-test-data/pc/SSDT b/tests/acpi-test-data/pc/SSDT
index d0103368a0b9e3d5410372f1f589df4eeeebaf03..dc5be2497b6c2015d7cbabb1ff0cd13e02b3e0e4 100644
GIT binary patch
delta 200
zcmX>mv_Y6FIM^j*11AFm<DZFK()F%_F?#XAPVoWGo(3H8&OyO~PV8KH9lQ)oJPaW4
zA4D*^GydTD!NbS_6ldgN1_^x!O8?-2^LhV+6n<_OXJCNHGca&5{Qu7lQVIl23}6{X
z2#<l||Ns5}z-(291K%ncqMMvq+yh*J4)E}F;SKN$FmN<5W8jDn1@b`R6IaV}JXrr=
NJtIpc!^W0F901$MEt&uT
delta 118
zcmdlWd`yTdIM^k`jgx_a(Pko-bi5O53<F1iL2x_|0|NsGkmVZB^Z)<;e;fgZVewo*
pDZ}7+L2fP%pez^w1zgbud{6`gJXmA&;)9*y1Drh#HoiN=0RVk=7KQ)-
diff --git a/tests/acpi-test-data/q35/DSDT b/tests/acpi-test-data/q35/DSDT
index de430e2a68e203518384b1db75baaefc02f2aa33..e9ac11c38ff98c36ba0c06abfd6b01fcb94b4452 100644
GIT binary patch
delta 46
zcmX?Vx5JvtCD<iohb#jF<Ft)j@r;{KFmW>q_(<zB#|Jyb2RM5gcm_MhZx&=Rkp=)i
CoD7=)
delta 425
zcmX|-Jxc>Y5Qb-R5RY{u3HX5oqF7jo=Ho~s1TU8(Mxrd)V52Z8Q%Mk;R1pa%HWv8<
z7OCtcjh#0B1}*&$HmO{9?mVa1edc|Kmz{mtf3Jy#Zgj&90DO8Dgrk#{UD9<@L96Hn
zolxiM3*zD~11Skyh7WAwT+SuBR!8Zu^kMB!`QK*@4}RaS0mMFl0Am(;)K&^22jdRD
zjCuWuIsH}`f*VXIzdpLQlHvLrOD@)ju<Q#8IvVczmEv6KN;$@!3KQ(BcBMQ}MNMp5
z2#L+X<yC}M2LzsZloM4tC75#9L(r*uV#!y!>czaO!UVTfyXp;8i6bN6$OziR)|eAG
zpf~N!`Y5q>RM>NpFKua`&Te+}aX>B|wi+^>1$0SweE}}7lgo-s6TtxoH@6P#nzM1r
G%l`r~K4Uik
diff --git a/tests/acpi-test-data/q35/SSDT b/tests/acpi-test-data/q35/SSDT
index f86643da45ad89a97a652233cb090516afde7b31..749f368e3034bfb491dcd8ced37936e0dcbba02a 100644
GIT binary patch
delta 200
zcmX@avX+%AIM^j*EfWI+<D!XN()FG^F?#XAPVoWGo(3H8&OyO~PV8KH9lQ)oJPaW4
zA4D*^GydTD!NbS_6ldgN1_^x!O8?-2^LhV+6n<_OXJCNHGca&5{Qu7lQVIl23}6{X
z2#?{w|Nr~{f!V4I2ka^tqMMvq+yh*J4)E}F;SKN$FmN<5W8jDn1@b`R6Yt1!D6lE8
NF$z>NY;4}o2modBDslh-
delta 117
zcmZ3>dWeN9IM^k`iHU)MaoI#J={P6W7zU02gWz}`1_p)$K$dGf&;S4X|8WEuhQ)IM
or3{1P1-ZF6fU;l!6mUfs@Ies};EvIY4|a+VaP~CV_-;QV0J~ckEdT%j
--
1.8.3.1
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 10/16] tests: bios-tables-test: add support for testing bridges
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (8 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 09/16] tests: ACPI test blobs update due to PCI0._CRS changes Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 11/16] tests: add ACPI blobs for qemu with bridge cases Igor Mammedov
` (5 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
Adds alternative ACPI table blob selection for testing
non default QEMU configurations. If blob file for test
variant is not present, fallback to default blob.
With this change implement testing with a coldplugged
bridge.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
tests/bios-tables-test.c | 45 ++++++++++++++++++++++++++++++++++++++++-----
1 file changed, 40 insertions(+), 5 deletions(-)
diff --git a/tests/bios-tables-test.c b/tests/bios-tables-test.c
index 4d0fa84..735ac61 100644
--- a/tests/bios-tables-test.c
+++ b/tests/bios-tables-test.c
@@ -40,6 +40,7 @@ typedef struct {
typedef struct {
const char *machine;
+ const char *variant;
uint32_t rsdp_addr;
AcpiRsdpDescriptor rsdp_table;
AcpiRsdtDescriptorRev1 rsdt_table;
@@ -396,13 +397,14 @@ static void dump_aml_files(test_data *data, bool rebuild)
int i;
for (i = 0; i < data->tables->len; ++i) {
+ const char *ext = data->variant ? data->variant : "";
sdt = &g_array_index(data->tables, AcpiSdtTable, i);
g_assert(sdt->aml);
if (rebuild) {
uint32_t signature = cpu_to_le32(sdt->header.signature);
- aml_file = g_strdup_printf("%s/%s/%.4s", data_dir, data->machine,
- (gchar *)&signature);
+ aml_file = g_strdup_printf("%s/%s/%.4s%s", data_dir, data->machine,
+ (gchar *)&signature, ext);
fd = g_open(aml_file, O_WRONLY|O_TRUNC|O_CREAT,
S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH);
} else {
@@ -509,7 +511,7 @@ static GArray *load_expected_aml(test_data *data)
{
int i;
AcpiSdtTable *sdt;
- gchar *aml_file;
+ gchar *aml_file = NULL;
GError *error = NULL;
gboolean ret;
@@ -517,6 +519,7 @@ static GArray *load_expected_aml(test_data *data)
for (i = 0; i < data->tables->len; ++i) {
AcpiSdtTable exp_sdt;
uint32_t signature;
+ const char *ext = data->variant ? data->variant : "";
sdt = &g_array_index(data->tables, AcpiSdtTable, i);
@@ -524,8 +527,15 @@ static GArray *load_expected_aml(test_data *data)
exp_sdt.header.signature = sdt->header.signature;
signature = cpu_to_le32(sdt->header.signature);
- aml_file = g_strdup_printf("%s/%s/%.4s", data_dir, data->machine,
- (gchar *)&signature);
+
+try_again:
+ aml_file = g_strdup_printf("%s/%s/%.4s%s", data_dir, data->machine,
+ (gchar *)&signature, ext);
+ if (data->variant && !g_file_test(aml_file, G_FILE_TEST_EXISTS)) {
+ g_free(aml_file);
+ ext = "";
+ goto try_again;
+ }
exp_sdt.aml_file = aml_file;
g_assert(g_file_test(aml_file, G_FILE_TEST_EXISTS));
ret = g_file_get_contents(aml_file, &exp_sdt.aml,
@@ -778,6 +788,17 @@ static void test_acpi_piix4_tcg(void)
free_test_data(&data);
}
+static void test_acpi_piix4_tcg_bridge(void)
+{
+ test_data data;
+
+ memset(&data, 0, sizeof(data));
+ data.machine = MACHINE_PC;
+ data.variant = ".bridge";
+ test_acpi_one("-machine accel=tcg -device pci-bridge,chassis_nr=1", &data);
+ free_test_data(&data);
+}
+
static void test_acpi_q35_tcg(void)
{
test_data data;
@@ -788,6 +809,18 @@ static void test_acpi_q35_tcg(void)
free_test_data(&data);
}
+static void test_acpi_q35_tcg_bridge(void)
+{
+ test_data data;
+
+ memset(&data, 0, sizeof(data));
+ data.machine = MACHINE_Q35;
+ data.variant = ".bridge";
+ test_acpi_one("-machine q35,accel=tcg -device pci-bridge,chassis_nr=1",
+ &data);
+ free_test_data(&data);
+}
+
int main(int argc, char *argv[])
{
const char *arch = qtest_get_arch();
@@ -805,7 +838,9 @@ int main(int argc, char *argv[])
if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) {
qtest_add_func("acpi/piix4/tcg", test_acpi_piix4_tcg);
+ qtest_add_func("acpi/piix4/tcg/bridge", test_acpi_piix4_tcg_bridge);
qtest_add_func("acpi/q35/tcg", test_acpi_q35_tcg);
+ qtest_add_func("acpi/q35/tcg/bridge", test_acpi_q35_tcg_bridge);
}
ret = g_test_run();
unlink(disk);
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 11/16] tests: add ACPI blobs for qemu with bridge cases
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (9 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 10/16] tests: bios-tables-test: add support for testing bridges Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 12/16] pc: acpi-build: simplify PCI bus tree generation Igor Mammedov
` (4 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
tests/acpi-test-data/pc/SSDT.bridge | Bin 0 -> 4352 bytes
tests/acpi-test-data/q35/SSDT.bridge | Bin 0 -> 702 bytes
2 files changed, 0 insertions(+), 0 deletions(-)
create mode 100644 tests/acpi-test-data/pc/SSDT.bridge
create mode 100644 tests/acpi-test-data/q35/SSDT.bridge
diff --git a/tests/acpi-test-data/pc/SSDT.bridge b/tests/acpi-test-data/pc/SSDT.bridge
new file mode 100644
index 0000000000000000000000000000000000000000..b807ac92dde72719fe3861c710b555fe3dd62583
GIT binary patch
literal 4352
zcmeH}&2HO96ov0ljLlF~Ov!ZYIC0FayGZCbaon9GlCk_ln$S=|3K`*|2&w=@6C@3a
zz#H2I)b6`4vdB7mg!U2o2-)-r3bgK~>b<0{<b|f_vIV3CHHY`pnHkP-j-(7yr~-%|
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znA1=<qflld+KZ*=o-Gx>k|DB3;bXi=-*x698lT<xHQ$3xtm0xWNYBfRtP!;Heb_z!
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zlqkC{F}kEeo9ud>(d$Z-U6&bMR-rz-t}wcyMA`KQqc>D&z^<!|t}0P>y~*fJ6&kYZ
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ziitTr{-zC2fzCp87OJyQorUWECRF3KB2>#KJ&H#>Ym4Nhq`=d(5EK)5UKWBf0#C$3
T%yO7={=b{U>qQO=MGpTBc|!Xx
literal 0
HcmV?d00001
diff --git a/tests/acpi-test-data/q35/SSDT.bridge b/tests/acpi-test-data/q35/SSDT.bridge
new file mode 100644
index 0000000000000000000000000000000000000000..c552782f5bcc57094a7d1375b67979b2efa48f1c
GIT binary patch
literal 702
zcmaJ<&2G~`5T12{vDO=5f)N!Le1$`C2}PVx?X`*1#?H#?q9RAy1F9%eMNvx+y^$aR
zcV2))p96RVj(HCb<b;`VXt}Y6+3%YleKWJGby9t`09YJPWTu07Pf3kF1^|TV_C{j5
zZggyv9EFaNrM@0t<*z^Wz!De+XvnZ3TZ*M%4*Hqskn0zQm*SH58cO{6@fN@;4#1&l
zTuQ}bK^q}OI^Ub-+wZ^d$r;ph*&V7B^|MjZQ-unn@DVs>7a943<NcGP)8iNWC+O5w
z#NAb=J<f+LumhWUXW-qPQgmSYc9)?L;)ka1bh*WG2go)lLZV)Jn<lR3JKc2}Ta~G9
zrA73E+bdbAc7yEb?VH2Xm;Y5?h=pJQj_^*Ex?=7^@SvWFmY^|PUj2R`RT!?O^@Yi!
z3eKg<BS3<~5YZL*J(F&S3`x2T2Y$b(o<6s}xStOIK2ZHDN2*ED?=a>`XL`SL@n(6Z
z5+_fJ5=W%hYj=XX=deayWhyV33!JajvpYmOc^QubG#Q#Pp)n%0XRz%XZ8mK2Jk^Hf
zqe8QKc5_vwQ_P*D&(LTY_;ybHc{^8Vf%W{F4nyOZC@I@tQ_t_|@bRUCfsgy&NZ`B$
U4=%uf02OciE4IM5l`Jaw0}NP~0RR91
literal 0
HcmV?d00001
--
1.8.3.1
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 12/16] pc: acpi-build: simplify PCI bus tree generation
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (10 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 11/16] tests: add ACPI blobs for qemu with bridge cases Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 13/16] tests: ACPI: update pc/SSDT.bridge due to new alg of PCI tree creation Igor Mammedov
` (3 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
it basicaly does the same as original approach,
* just without bus/notify tables tracking (less obscure)
which is easier to follow.
* drops unnecessary loops and bitmaps,
creating devices and notification method in the same loop.
* saves us ~100LOC
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
v2:
* fixed 'make check' failure on Q35, which was caused by
adding slots for non present devices when ACPI
hotplug is disabled
* fixed 'make check' failure on Q35, which was caused by
marking devices as hotpluggable when ACPI hotplug is disabled
---
hw/i386/acpi-build.c | 274 ++++++++++++++++-----------------------------------
1 file changed, 85 insertions(+), 189 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 05eb80a..ba056f0 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -112,7 +112,6 @@ typedef struct AcpiPmInfo {
typedef struct AcpiMiscInfo {
bool has_hpet;
bool has_tpm;
- DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);
const unsigned char *dsdt_code;
unsigned dsdt_size;
uint16_t pvpanic_port;
@@ -591,74 +590,37 @@ static void acpi_set_pci_info(void)
}
}
-static void build_pci_bus_state_init(AcpiBuildPciBusHotplugState *state,
- AcpiBuildPciBusHotplugState *parent,
- bool pcihp_bridge_en)
+static void build_append_pcihp_notify_entry(GArray *method, int slot)
{
- state->parent = parent;
- state->device_table = build_alloc_array();
- state->notify_table = build_alloc_array();
- state->pcihp_bridge_en = pcihp_bridge_en;
+ GArray *ifctx;
+
+ ifctx = build_alloc_array();
+ build_append_byte(ifctx, 0x7B); /* AndOp */
+ build_append_byte(ifctx, 0x68); /* Arg0Op */
+ build_append_int(ifctx, 0x1U << slot);
+ build_append_byte(ifctx, 0x00); /* NullName */
+ build_append_byte(ifctx, 0x86); /* NotifyOp */
+ build_append_namestring(ifctx, "S%.02X", PCI_DEVFN(slot, 0));
+ build_append_byte(ifctx, 0x69); /* Arg1Op */
+
+ /* Pack it up */
+ build_package(ifctx, 0xA0 /* IfOp */);
+ build_append_array(method, ifctx);
+ build_free_array(ifctx);
}
-static void build_pci_bus_state_cleanup(AcpiBuildPciBusHotplugState *state)
+static void build_append_pci_bus_devices(GArray *parent_scope, PCIBus *bus,
+ bool pcihp_bridge_en)
{
- build_free_array(state->device_table);
- build_free_array(state->notify_table);
-}
-
-static void *build_pci_bus_begin(PCIBus *bus, void *parent_state)
-{
- AcpiBuildPciBusHotplugState *parent = parent_state;
- AcpiBuildPciBusHotplugState *child = g_malloc(sizeof *child);
-
- build_pci_bus_state_init(child, parent, parent->pcihp_bridge_en);
-
- return child;
-}
-
-static void build_pci_bus_end(PCIBus *bus, void *bus_state)
-{
- AcpiBuildPciBusHotplugState *child = bus_state;
- AcpiBuildPciBusHotplugState *parent = child->parent;
GArray *bus_table = build_alloc_array();
- DECLARE_BITMAP(slot_hotplug_enable, PCI_SLOT_MAX);
- DECLARE_BITMAP(slot_device_present, PCI_SLOT_MAX);
- DECLARE_BITMAP(slot_device_system, PCI_SLOT_MAX);
- DECLARE_BITMAP(slot_device_vga, PCI_SLOT_MAX);
- DECLARE_BITMAP(slot_device_qxl, PCI_SLOT_MAX);
- uint8_t op;
- int i;
+ GArray *method = NULL;
QObject *bsel;
- GArray *method;
- bool bus_hotplug_support = false;
-
- /*
- * Skip bridge subtree creation if bridge hotplug is disabled
- * to make acpi tables compatible with legacy machine types.
- * Skip creation for hotplugged bridges as well.
- */
- if (bus->parent_dev && (!child->pcihp_bridge_en ||
- DEVICE(bus->parent_dev)->hotplugged)) {
- build_free_array(bus_table);
- build_pci_bus_state_cleanup(child);
- g_free(child);
- return;
- }
+ PCIBus *sec;
+ int i;
if (bus->parent_dev) {
- op = 0x82; /* DeviceOp */
- build_append_namestring(bus_table, "S%.02X",
- bus->parent_dev->devfn);
- build_append_byte(bus_table, 0x08); /* NameOp */
- build_append_namestring(bus_table, "_SUN");
- build_append_int(bus_table, PCI_SLOT(bus->parent_dev->devfn));
- build_append_byte(bus_table, 0x08); /* NameOp */
- build_append_namestring(bus_table, "_ADR");
- build_append_int(bus_table, (PCI_SLOT(bus->parent_dev->devfn) << 16) |
- PCI_FUNC(bus->parent_dev->devfn));
+ build_append_namestring(bus_table, "S%.02X_", bus->parent_dev->devfn);
} else {
- op = 0x10; /* ScopeOp */;
build_append_namestring(bus_table, "PCI0");
}
@@ -667,29 +629,28 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state)
build_append_byte(bus_table, 0x08); /* NameOp */
build_append_namestring(bus_table, "BSEL");
build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel)));
- memset(slot_hotplug_enable, 0xff, sizeof slot_hotplug_enable);
- } else {
- /* No bsel - no slots are hot-pluggable */
- memset(slot_hotplug_enable, 0x00, sizeof slot_hotplug_enable);
+ method = build_alloc_method("DVNT", 2);
}
- memset(slot_device_present, 0x00, sizeof slot_device_present);
- memset(slot_device_system, 0x00, sizeof slot_device_present);
- memset(slot_device_vga, 0x00, sizeof slot_device_vga);
- memset(slot_device_qxl, 0x00, sizeof slot_device_qxl);
-
for (i = 0; i < ARRAY_SIZE(bus->devices); i += PCI_FUNC_MAX) {
DeviceClass *dc;
PCIDeviceClass *pc;
PCIDevice *pdev = bus->devices[i];
int slot = PCI_SLOT(i);
+ bool hotplug_enabled_dev;
bool bridge_in_acpi;
if (!pdev) {
+ if (bsel) { /* add hotplug slots for non present devices */
+ void *pcihp = acpi_data_push(bus_table, ACPI_PCIHP_SIZEOF);
+ memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
+ patch_pcihp(slot, pcihp);
+
+ build_append_pcihp_notify_entry(method, slot);
+ }
continue;
}
- set_bit(slot, slot_device_present);
pc = PCI_DEVICE_GET_CLASS(pdev);
dc = DEVICE_GET_CLASS(pdev);
@@ -698,142 +659,83 @@ static void build_pci_bus_end(PCIBus *bus, void *bus_state)
* In this case they aren't themselves hot-pluggable.
* Hotplugged bridges *are* hot-pluggable.
*/
- bridge_in_acpi = pc->is_bridge && child->pcihp_bridge_en &&
- !DEVICE(pdev)->hotplugged;
+ bridge_in_acpi = pc->is_bridge && pcihp_bridge_en &&
+ !DEVICE(pdev)->hotplugged;
- if (pc->class_id == PCI_CLASS_BRIDGE_ISA || bridge_in_acpi) {
- set_bit(slot, slot_device_system);
+ hotplug_enabled_dev = bsel && dc->hotpluggable && !bridge_in_acpi;
+
+ if (pc->class_id == PCI_CLASS_BRIDGE_ISA) {
+ continue;
}
if (pc->class_id == PCI_CLASS_DISPLAY_VGA) {
- set_bit(slot, slot_device_vga);
-
if (object_dynamic_cast(OBJECT(pdev), "qxl-vga")) {
- set_bit(slot, slot_device_qxl);
+ void *pcihp = acpi_data_push(bus_table,
+ ACPI_PCIQXL_SIZEOF);
+ memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF);
+ patch_pciqxl(slot, pcihp);
+ } else {
+ void *pcihp = acpi_data_push(bus_table,
+ ACPI_PCIVGA_SIZEOF);
+ memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF);
+ patch_pcivga(slot, pcihp);
}
- }
-
- if (!dc->hotpluggable || bridge_in_acpi) {
- clear_bit(slot, slot_hotplug_enable);
- }
- }
+ } else if (hotplug_enabled_dev) {
+ void *pcihp = acpi_data_push(bus_table, ACPI_PCIHP_SIZEOF);
- /* Append Device object for each slot */
- for (i = 0; i < PCI_SLOT_MAX; i++) {
- bool can_eject = test_bit(i, slot_hotplug_enable);
- bool present = test_bit(i, slot_device_present);
- bool vga = test_bit(i, slot_device_vga);
- bool qxl = test_bit(i, slot_device_qxl);
- bool system = test_bit(i, slot_device_system);
- if (can_eject) {
- void *pcihp = acpi_data_push(bus_table,
- ACPI_PCIHP_SIZEOF);
memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
- patch_pcihp(i, pcihp);
- bus_hotplug_support = true;
- } else if (qxl) {
- void *pcihp = acpi_data_push(bus_table,
- ACPI_PCIQXL_SIZEOF);
- memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF);
- patch_pciqxl(i, pcihp);
- } else if (vga) {
- void *pcihp = acpi_data_push(bus_table,
- ACPI_PCIVGA_SIZEOF);
- memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF);
- patch_pcivga(i, pcihp);
- } else if (system) {
- /* Nothing to do: system devices are in DSDT or in SSDT above. */
- } else if (present) {
- void *pcihp = acpi_data_push(bus_table,
- ACPI_PCINOHP_SIZEOF);
+ patch_pcihp(slot, pcihp);
+ build_append_pcihp_notify_entry(method, slot);
+ } else if (bridge_in_acpi) {
+ PCIBus *sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
+ void *pcihp = acpi_data_push(bus_table, ACPI_PCINOHP_SIZEOF);
+
+ memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);
+ patch_pcinohp(slot, pcihp);
+ build_append_pci_bus_devices(bus_table, sec_bus, pcihp_bridge_en);
+ } else { /* non hotpluggable present devices */
+ void *pcihp = acpi_data_push(bus_table, ACPI_PCINOHP_SIZEOF);
+
memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);
- patch_pcinohp(i, pcihp);
+ patch_pcinohp(slot, pcihp);
}
}
if (bsel) {
- method = build_alloc_method("DVNT", 2);
-
- for (i = 0; i < PCI_SLOT_MAX; i++) {
- GArray *notify;
- uint8_t op;
-
- if (!test_bit(i, slot_hotplug_enable)) {
- continue;
- }
-
- notify = build_alloc_array();
- op = 0xA0; /* IfOp */
-
- build_append_byte(notify, 0x7B); /* AndOp */
- build_append_byte(notify, 0x68); /* Arg0Op */
- build_append_int(notify, 0x1U << i);
- build_append_byte(notify, 0x00); /* NullName */
- build_append_byte(notify, 0x86); /* NotifyOp */
- build_append_namestring(notify, "S%.02X", PCI_DEVFN(i, 0));
- build_append_byte(notify, 0x69); /* Arg1Op */
-
- /* Pack it up */
- build_package(notify, op);
-
- build_append_array(method, notify);
-
- build_free_array(notify);
- }
-
build_append_and_cleanup_method(bus_table, method);
}
/* Append PCNT method to notify about events on local and child buses.
* Add unconditionally for root since DSDT expects it.
*/
- if (bus_hotplug_support || child->notify_table->len || !bus->parent_dev) {
- method = build_alloc_method("PCNT", 0);
-
- /* If bus supports hotplug select it and notify about local events */
- if (bsel) {
- build_append_byte(method, 0x70); /* StoreOp */
- build_append_int(method, qint_get_int(qobject_to_qint(bsel)));
- build_append_namestring(method, "BNUM");
- build_append_namestring(method, "DVNT");
- build_append_namestring(method, "PCIU");
- build_append_int(method, 1); /* Device Check */
- build_append_namestring(method, "DVNT");
- build_append_namestring(method, "PCID");
- build_append_int(method, 3); /* Eject Request */
- }
-
- /* Notify about child bus events in any case */
- build_append_array(method, child->notify_table);
-
- build_append_and_cleanup_method(bus_table, method);
-
- /* Append description of child buses */
- build_append_array(bus_table, child->device_table);
-
- /* Pack it up */
- if (bus->parent_dev) {
- build_extop_package(bus_table, op);
- } else {
- build_package(bus_table, op);
- }
+ method = build_alloc_method("PCNT", 0);
- /* Append our bus description to parent table */
- build_append_array(parent->device_table, bus_table);
+ /* If bus supports hotplug select it and notify about local events */
+ if (bsel) {
+ build_append_byte(method, 0x70); /* StoreOp */
+ build_append_int(method, qint_get_int(qobject_to_qint(bsel)));
+ build_append_namestring(method, "BNUM");
+ build_append_namestring(method, "DVNT");
+ build_append_namestring(method, "PCIU");
+ build_append_int(method, 1); /* Device Check */
+ build_append_namestring(method, "DVNT");
+ build_append_namestring(method, "PCID");
+ build_append_int(method, 3); /* Eject Request */
+ }
- /* Also tell parent how to notify us, invoking PCNT method.
- * At the moment this is not needed for root as we have a single root.
- */
- if (bus->parent_dev) {
- build_append_namestring(parent->notify_table, "^PCNT.S%.02X",
- bus->parent_dev->devfn);
+ /* Notify about child bus events in any case */
+ if (pcihp_bridge_en) {
+ QLIST_FOREACH(sec, &bus->child, sibling) {
+ build_append_namestring(method, "^S%.02X.PCNT",
+ sec->parent_dev->devfn);
}
}
- qobject_decref(bsel);
+ build_append_and_cleanup_method(bus_table, method);
+
+ build_package(bus_table, 0x10); /* ScopeOp */
+ build_append_array(parent_scope, bus_table);
build_free_array(bus_table);
- build_pci_bus_state_cleanup(child);
- g_free(child);
}
static void
@@ -1175,7 +1077,6 @@ build_ssdt(GArray *table_data, GArray *linker,
aml_append(sb_scope, method);
{
- AcpiBuildPciBusHotplugState hotplug_state;
Object *pci_host;
PCIBus *bus = NULL;
bool ambiguous;
@@ -1185,16 +1086,11 @@ build_ssdt(GArray *table_data, GArray *linker,
bus = PCI_HOST_BRIDGE(pci_host)->bus;
}
- build_pci_bus_state_init(&hotplug_state, NULL, pm->pcihp_bridge_en);
-
if (bus) {
/* Scan all PCI buses. Generate tables to support hotplug. */
- pci_for_each_bus_depth_first(bus, build_pci_bus_begin,
- build_pci_bus_end, &hotplug_state);
+ build_append_pci_bus_devices(sb_scope->buf, bus,
+ pm->pcihp_bridge_en);
}
-
- build_append_array(sb_scope->buf, hotplug_state.device_table);
- build_pci_bus_state_cleanup(&hotplug_state);
}
aml_append(ssdt, sb_scope);
}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 13/16] tests: ACPI: update pc/SSDT.bridge due to new alg of PCI tree creation
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (11 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 12/16] pc: acpi-build: simplify PCI bus tree generation Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 14/16] pc: acpi-build: drop template patching and create PCI bus tree dynamically Igor Mammedov
` (2 subsequent siblings)
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
tests/acpi-test-data/pc/SSDT.bridge | Bin 4352 -> 4351 bytes
1 file changed, 0 insertions(+), 0 deletions(-)
diff --git a/tests/acpi-test-data/pc/SSDT.bridge b/tests/acpi-test-data/pc/SSDT.bridge
index b807ac92dde72719fe3861c710b555fe3dd62583..ca7f63cb4e48bd95418f68daf1b7e254d5bcf8c2 100644
GIT binary patch
delta 79
zcmZor`me|p9PASEUx0yu@ybT7Xhue_&1sCDjEoMGH!yjL@dq1P#B;<ux&-ksFfcO+
fc$a|$HqYivW#8<}wUuS_TK2Py93Zg(XTJ~taxE4S
delta 76
zcmeyb*r3D}9PARpAjrVLIBz3YG$W(;<}^l6Mn=cU8<@N{mvc3+DF!(Eg#;T~#78&z
dl!IuF_~1}KE@qB+N0%TT1_ow^%>vA+>;M#S6CwZr
--
1.8.3.1
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 14/16] pc: acpi-build: drop template patching and create PCI bus tree dynamically
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (12 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 13/16] tests: ACPI: update pc/SSDT.bridge due to new alg of PCI tree creation Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 15/16] pc: acpi: remove not used anymore ssdt-[misc|pcihp].hex.generated blobs Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 16/16] acpi: make build_*() routines static to aml-build.c Igor Mammedov
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
Replace AML template patching with direct composing
of PCI device entries in C. It allows to simplify
PCI tree generation further and saves us about 400LOC
scattered through different files, confining tree
generation to one C function which is much easier
to deal with.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
v2:
* add some comments to the process of device creation
---
hw/i386/Makefile.objs | 1 -
hw/i386/acpi-build.c | 235 +++++++++++++++++--------------------------------
hw/i386/ssdt-pcihp.dsl | 100 ---------------------
3 files changed, 80 insertions(+), 256 deletions(-)
delete mode 100644 hw/i386/ssdt-pcihp.dsl
diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
index 9b00568..e058a39 100644
--- a/hw/i386/Makefile.objs
+++ b/hw/i386/Makefile.objs
@@ -9,7 +9,6 @@ obj-y += kvmvapic.o
obj-y += acpi-build.o
hw/i386/acpi-build.o: hw/i386/acpi-build.c \
hw/i386/acpi-dsdt.hex hw/i386/q35-acpi-dsdt.hex \
- hw/i386/ssdt-pcihp.hex \
hw/i386/ssdt-tpm.hex
iasl-option=$(shell if test -z "`$(1) $(2) 2>&1 > /dev/null`" \
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index ba056f0..b94e47e 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -294,26 +294,6 @@ build_header(GArray *linker, GArray *table_data,
table_data->data, h, len, &h->checksum);
}
-static GArray *build_alloc_method(const char *name, uint8_t arg_count)
-{
- GArray *method = build_alloc_array();
-
- build_append_namestring(method, "%s", name);
- build_append_byte(method, arg_count); /* MethodFlags: ArgCount */
-
- return method;
-}
-
-static void build_append_and_cleanup_method(GArray *device, GArray *method)
-{
- uint8_t op = 0x14; /* MethodOp */
-
- build_package(method, op);
-
- build_append_array(device, method);
- build_free_array(method);
-}
-
/* End here */
#define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */
@@ -494,71 +474,12 @@ static inline char acpi_get_hex(uint32_t val)
return (val <= 9) ? ('0' + val) : ('A' + val - 10);
}
-/* 0x5B 0x82 DeviceOp PkgLength NameString */
-#define ACPI_PCIHP_OFFSET_HEX (*ssdt_pcihp_name - *ssdt_pcihp_start + 1)
-#define ACPI_PCIHP_OFFSET_ID (*ssdt_pcihp_id - *ssdt_pcihp_start)
-#define ACPI_PCIHP_OFFSET_ADR (*ssdt_pcihp_adr - *ssdt_pcihp_start)
-#define ACPI_PCIHP_OFFSET_EJ0 (*ssdt_pcihp_ej0 - *ssdt_pcihp_start)
-#define ACPI_PCIHP_SIZEOF (*ssdt_pcihp_end - *ssdt_pcihp_start)
-#define ACPI_PCIHP_AML (ssdp_pcihp_aml + *ssdt_pcihp_start)
-
-#define ACPI_PCINOHP_OFFSET_HEX (*ssdt_pcinohp_name - *ssdt_pcinohp_start + 1)
-#define ACPI_PCINOHP_OFFSET_ADR (*ssdt_pcinohp_adr - *ssdt_pcinohp_start)
-#define ACPI_PCINOHP_SIZEOF (*ssdt_pcinohp_end - *ssdt_pcinohp_start)
-#define ACPI_PCINOHP_AML (ssdp_pcihp_aml + *ssdt_pcinohp_start)
-
-#define ACPI_PCIVGA_OFFSET_HEX (*ssdt_pcivga_name - *ssdt_pcivga_start + 1)
-#define ACPI_PCIVGA_OFFSET_ADR (*ssdt_pcivga_adr - *ssdt_pcivga_start)
-#define ACPI_PCIVGA_SIZEOF (*ssdt_pcivga_end - *ssdt_pcivga_start)
-#define ACPI_PCIVGA_AML (ssdp_pcihp_aml + *ssdt_pcivga_start)
-
-#define ACPI_PCIQXL_OFFSET_HEX (*ssdt_pciqxl_name - *ssdt_pciqxl_start + 1)
-#define ACPI_PCIQXL_OFFSET_ADR (*ssdt_pciqxl_adr - *ssdt_pciqxl_start)
-#define ACPI_PCIQXL_SIZEOF (*ssdt_pciqxl_end - *ssdt_pciqxl_start)
-#define ACPI_PCIQXL_AML (ssdp_pcihp_aml + *ssdt_pciqxl_start)
#define ACPI_SSDT_SIGNATURE 0x54445353 /* SSDT */
#define ACPI_SSDT_HEADER_LENGTH 36
-#include "hw/i386/ssdt-pcihp.hex"
#include "hw/i386/ssdt-tpm.hex"
-static void patch_pcihp(int slot, uint8_t *ssdt_ptr)
-{
- unsigned devfn = PCI_DEVFN(slot, 0);
-
- ssdt_ptr[ACPI_PCIHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
- ssdt_ptr[ACPI_PCIHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
- ssdt_ptr[ACPI_PCIHP_OFFSET_ID] = slot;
- ssdt_ptr[ACPI_PCIHP_OFFSET_ADR + 2] = slot;
-}
-
-static void patch_pcinohp(int slot, uint8_t *ssdt_ptr)
-{
- unsigned devfn = PCI_DEVFN(slot, 0);
-
- ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
- ssdt_ptr[ACPI_PCINOHP_OFFSET_HEX + 1] = acpi_get_hex(devfn);
- ssdt_ptr[ACPI_PCINOHP_OFFSET_ADR + 2] = slot;
-}
-
-static void patch_pcivga(int slot, uint8_t *ssdt_ptr)
-{
- unsigned devfn = PCI_DEVFN(slot, 0);
-
- ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
- ssdt_ptr[ACPI_PCIVGA_OFFSET_HEX + 1] = acpi_get_hex(devfn);
- ssdt_ptr[ACPI_PCIVGA_OFFSET_ADR + 2] = slot;
-}
-
-static void patch_pciqxl(int slot, uint8_t *ssdt_ptr)
-{
- unsigned devfn = PCI_DEVFN(slot, 0);
-
- ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX] = acpi_get_hex(devfn >> 4);
- ssdt_ptr[ACPI_PCIQXL_OFFSET_HEX + 1] = acpi_get_hex(devfn);
- ssdt_ptr[ACPI_PCIQXL_OFFSET_ADR + 2] = slot;
-}
/* Assign BSEL property to all buses. In the future, this can be changed
* to only assign to buses that support hotplug.
@@ -590,46 +511,30 @@ static void acpi_set_pci_info(void)
}
}
-static void build_append_pcihp_notify_entry(GArray *method, int slot)
+static void build_append_pcihp_notify_entry(Aml *method, int slot)
{
- GArray *ifctx;
-
- ifctx = build_alloc_array();
- build_append_byte(ifctx, 0x7B); /* AndOp */
- build_append_byte(ifctx, 0x68); /* Arg0Op */
- build_append_int(ifctx, 0x1U << slot);
- build_append_byte(ifctx, 0x00); /* NullName */
- build_append_byte(ifctx, 0x86); /* NotifyOp */
- build_append_namestring(ifctx, "S%.02X", PCI_DEVFN(slot, 0));
- build_append_byte(ifctx, 0x69); /* Arg1Op */
-
- /* Pack it up */
- build_package(ifctx, 0xA0 /* IfOp */);
- build_append_array(method, ifctx);
- build_free_array(ifctx);
+ Aml *if_ctx;
+ int32_t devfn = PCI_DEVFN(slot, 0);
+
+ if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot)));
+ aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
+ aml_append(method, if_ctx);
}
-static void build_append_pci_bus_devices(GArray *parent_scope, PCIBus *bus,
+static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus,
bool pcihp_bridge_en)
{
- GArray *bus_table = build_alloc_array();
- GArray *method = NULL;
+ Aml *dev, *notify_method, *method;
QObject *bsel;
PCIBus *sec;
int i;
- if (bus->parent_dev) {
- build_append_namestring(bus_table, "S%.02X_", bus->parent_dev->devfn);
- } else {
- build_append_namestring(bus_table, "PCI0");
- }
-
bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
if (bsel) {
- build_append_byte(bus_table, 0x08); /* NameOp */
- build_append_namestring(bus_table, "BSEL");
- build_append_int(bus_table, qint_get_int(qobject_to_qint(bsel)));
- method = build_alloc_method("DVNT", 2);
+ int64_t bsel_val = qint_get_int(qobject_to_qint(bsel));
+
+ aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
+ notify_method = aml_method("DVNT", 2);
}
for (i = 0; i < ARRAY_SIZE(bus->devices); i += PCI_FUNC_MAX) {
@@ -642,11 +547,17 @@ static void build_append_pci_bus_devices(GArray *parent_scope, PCIBus *bus,
if (!pdev) {
if (bsel) { /* add hotplug slots for non present devices */
- void *pcihp = acpi_data_push(bus_table, ACPI_PCIHP_SIZEOF);
- memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
- patch_pcihp(slot, pcihp);
-
- build_append_pcihp_notify_entry(method, slot);
+ dev = aml_device("S%.02X", PCI_DEVFN(slot, 0));
+ aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
+ aml_append(dev, aml_name_decl("_ADR", aml_int(slot << 16)));
+ method = aml_method("_EJ0", 1);
+ aml_append(method,
+ aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
+ );
+ aml_append(dev, method);
+ aml_append(parent_scope, dev);
+
+ build_append_pcihp_notify_entry(notify_method, slot);
}
continue;
}
@@ -668,74 +579,87 @@ static void build_append_pci_bus_devices(GArray *parent_scope, PCIBus *bus,
continue;
}
+ /* start to compose PCI slot descriptor */
+ dev = aml_device("S%.02X", PCI_DEVFN(slot, 0));
+ aml_append(dev, aml_name_decl("_ADR", aml_int(slot << 16)));
+
if (pc->class_id == PCI_CLASS_DISPLAY_VGA) {
+ /* add VGA specific AML methods */
+ int s3d;
+
if (object_dynamic_cast(OBJECT(pdev), "qxl-vga")) {
- void *pcihp = acpi_data_push(bus_table,
- ACPI_PCIQXL_SIZEOF);
- memcpy(pcihp, ACPI_PCIQXL_AML, ACPI_PCIQXL_SIZEOF);
- patch_pciqxl(slot, pcihp);
+ s3d = 3;
} else {
- void *pcihp = acpi_data_push(bus_table,
- ACPI_PCIVGA_SIZEOF);
- memcpy(pcihp, ACPI_PCIVGA_AML, ACPI_PCIVGA_SIZEOF);
- patch_pcivga(slot, pcihp);
+ s3d = 0;
}
+
+ method = aml_method("_S1D", 0);
+ aml_append(method, aml_return(aml_int(0)));
+ aml_append(dev, method);
+
+ method = aml_method("_S2D", 0);
+ aml_append(method, aml_return(aml_int(0)));
+ aml_append(dev, method);
+
+ method = aml_method("_S3D", 0);
+ aml_append(method, aml_return(aml_int(s3d)));
+ aml_append(dev, method);
} else if (hotplug_enabled_dev) {
- void *pcihp = acpi_data_push(bus_table, ACPI_PCIHP_SIZEOF);
+ /* add _SUN/_EJ0 to make slot hotpluggable */
+ aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
- memcpy(pcihp, ACPI_PCIHP_AML, ACPI_PCIHP_SIZEOF);
- patch_pcihp(slot, pcihp);
- build_append_pcihp_notify_entry(method, slot);
+ method = aml_method("_EJ0", 1);
+ aml_append(method,
+ aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
+ );
+ aml_append(dev, method);
+
+ if (bsel) {
+ build_append_pcihp_notify_entry(notify_method, slot);
+ }
} else if (bridge_in_acpi) {
+ /*
+ * device is coldplugged bridge,
+ * add child device descriptions into its scope
+ */
PCIBus *sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
- void *pcihp = acpi_data_push(bus_table, ACPI_PCINOHP_SIZEOF);
- memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);
- patch_pcinohp(slot, pcihp);
- build_append_pci_bus_devices(bus_table, sec_bus, pcihp_bridge_en);
- } else { /* non hotpluggable present devices */
- void *pcihp = acpi_data_push(bus_table, ACPI_PCINOHP_SIZEOF);
-
- memcpy(pcihp, ACPI_PCINOHP_AML, ACPI_PCINOHP_SIZEOF);
- patch_pcinohp(slot, pcihp);
+ build_append_pci_bus_devices(dev, sec_bus, pcihp_bridge_en);
}
+ /* slot descriptor has been composed, add it into parent context */
+ aml_append(parent_scope, dev);
}
if (bsel) {
- build_append_and_cleanup_method(bus_table, method);
+ aml_append(parent_scope, notify_method);
}
/* Append PCNT method to notify about events on local and child buses.
* Add unconditionally for root since DSDT expects it.
*/
- method = build_alloc_method("PCNT", 0);
+ method = aml_method("PCNT", 0);
/* If bus supports hotplug select it and notify about local events */
if (bsel) {
- build_append_byte(method, 0x70); /* StoreOp */
- build_append_int(method, qint_get_int(qobject_to_qint(bsel)));
- build_append_namestring(method, "BNUM");
- build_append_namestring(method, "DVNT");
- build_append_namestring(method, "PCIU");
- build_append_int(method, 1); /* Device Check */
- build_append_namestring(method, "DVNT");
- build_append_namestring(method, "PCID");
- build_append_int(method, 3); /* Eject Request */
+ int64_t bsel_val = qint_get_int(qobject_to_qint(bsel));
+ aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM")));
+ aml_append(method,
+ aml_call2("DVNT", aml_name("PCIU"), aml_int(1) /* Device Check */)
+ );
+ aml_append(method,
+ aml_call2("DVNT", aml_name("PCID"), aml_int(3)/* Eject Request */)
+ );
}
/* Notify about child bus events in any case */
if (pcihp_bridge_en) {
QLIST_FOREACH(sec, &bus->child, sibling) {
- build_append_namestring(method, "^S%.02X.PCNT",
- sec->parent_dev->devfn);
+ int32_t devfn = sec->parent_dev->devfn;
+
+ aml_append(method, aml_name("^S%.02X.PCNT", devfn));
}
}
-
- build_append_and_cleanup_method(bus_table, method);
-
- build_package(bus_table, 0x10); /* ScopeOp */
- build_append_array(parent_scope, bus_table);
- build_free_array(bus_table);
+ aml_append(parent_scope, method);
}
static void
@@ -1087,9 +1011,10 @@ build_ssdt(GArray *table_data, GArray *linker,
}
if (bus) {
+ Aml *scope = aml_scope("PCI0");
/* Scan all PCI buses. Generate tables to support hotplug. */
- build_append_pci_bus_devices(sb_scope->buf, bus,
- pm->pcihp_bridge_en);
+ build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en);
+ aml_append(sb_scope, scope);
}
}
aml_append(ssdt, sb_scope);
diff --git a/hw/i386/ssdt-pcihp.dsl b/hw/i386/ssdt-pcihp.dsl
deleted file mode 100644
index ac91c05..0000000
--- a/hw/i386/ssdt-pcihp.dsl
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, see <http://www.gnu.org/licenses/>.
- */
-
-ACPI_EXTRACT_ALL_CODE ssdp_pcihp_aml
-
-DefinitionBlock ("ssdt-pcihp.aml", "SSDT", 0x01, "BXPC", "BXSSDTPCIHP", 0x1)
-{
-
-/****************************************************************
- * PCI hotplug
- ****************************************************************/
-
- /* Objects supplied by DSDT */
- External(\_SB.PCI0, DeviceObj)
- External(\_SB.PCI0.PCEJ, MethodObj)
- External(BSEL, IntObj)
-
- Scope(\_SB.PCI0) {
-
- /* Bulk generated PCI hotplug devices */
- ACPI_EXTRACT_DEVICE_START ssdt_pcihp_start
- ACPI_EXTRACT_DEVICE_END ssdt_pcihp_end
- ACPI_EXTRACT_DEVICE_STRING ssdt_pcihp_name
-
- // Extract the offsets of the device name, address dword and the slot
- // name byte - we fill them in for each device.
- Device(SAA) {
- ACPI_EXTRACT_NAME_BYTE_CONST ssdt_pcihp_id
- Name(_SUN, 0xAA)
- ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcihp_adr
- Name(_ADR, 0xAA0000)
- Method(_EJ0, 1) {
- PCEJ(BSEL, _SUN)
- }
- }
-
- ACPI_EXTRACT_DEVICE_START ssdt_pcinohp_start
- ACPI_EXTRACT_DEVICE_END ssdt_pcinohp_end
- ACPI_EXTRACT_DEVICE_STRING ssdt_pcinohp_name
-
- // Extract the offsets of the device name, address dword and the slot
- // name byte - we fill them in for each device.
- Device(SBB) {
- ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcinohp_adr
- Name(_ADR, 0xAA0000)
- }
-
- ACPI_EXTRACT_DEVICE_START ssdt_pcivga_start
- ACPI_EXTRACT_DEVICE_END ssdt_pcivga_end
- ACPI_EXTRACT_DEVICE_STRING ssdt_pcivga_name
-
- // Extract the offsets of the device name, address dword and the slot
- // name byte - we fill them in for each device.
- Device(SCC) {
- ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pcivga_adr
- Name(_ADR, 0xAA0000)
- Method(_S1D, 0, NotSerialized) {
- Return (0x00)
- }
- Method(_S2D, 0, NotSerialized) {
- Return (0x00)
- }
- Method(_S3D, 0, NotSerialized) {
- Return (0x00)
- }
- }
-
- ACPI_EXTRACT_DEVICE_START ssdt_pciqxl_start
- ACPI_EXTRACT_DEVICE_END ssdt_pciqxl_end
- ACPI_EXTRACT_DEVICE_STRING ssdt_pciqxl_name
-
- // Extract the offsets of the device name, address dword and the slot
- // name byte - we fill them in for each device.
- Device(SDD) {
- ACPI_EXTRACT_NAME_DWORD_CONST ssdt_pciqxl_adr
- Name(_ADR, 0xAA0000)
- Method(_S1D, 0, NotSerialized) {
- Return (0x00)
- }
- Method(_S2D, 0, NotSerialized) {
- Return (0x00)
- }
- Method(_S3D, 0, NotSerialized) {
- Return (0x03) // QXL
- }
- }
- }
-}
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 15/16] pc: acpi: remove not used anymore ssdt-[misc|pcihp].hex.generated blobs
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (13 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 14/16] pc: acpi-build: drop template patching and create PCI bus tree dynamically Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 16/16] acpi: make build_*() routines static to aml-build.c Igor Mammedov
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/i386/ssdt-misc.hex.generated | 139 ----------------------
hw/i386/ssdt-pcihp.hex.generated | 251 ---------------------------------------
2 files changed, 390 deletions(-)
delete mode 100644 hw/i386/ssdt-misc.hex.generated
delete mode 100644 hw/i386/ssdt-pcihp.hex.generated
diff --git a/hw/i386/ssdt-misc.hex.generated b/hw/i386/ssdt-misc.hex.generated
deleted file mode 100644
index 0b77ed4..0000000
--- a/hw/i386/ssdt-misc.hex.generated
+++ /dev/null
@@ -1,139 +0,0 @@
-static unsigned char acpi_pci64_length[] = {
-0x6f
-};
-static unsigned char acpi_pci32_start[] = {
-0x2f
-};
-static unsigned char acpi_pci64_valid[] = {
-0x43
-};
-static unsigned char ssdp_misc_aml[] = {
-0x53,
-0x53,
-0x44,
-0x54,
-0x77,
-0x0,
-0x0,
-0x0,
-0x1,
-0x40,
-0x42,
-0x58,
-0x50,
-0x43,
-0x0,
-0x0,
-0x42,
-0x58,
-0x53,
-0x53,
-0x44,
-0x54,
-0x53,
-0x55,
-0x1,
-0x0,
-0x0,
-0x0,
-0x49,
-0x4e,
-0x54,
-0x4c,
-0x7,
-0x11,
-0x14,
-0x20,
-0x10,
-0x42,
-0x5,
-0x5c,
-0x0,
-0x8,
-0x50,
-0x30,
-0x53,
-0x5f,
-0xc,
-0x78,
-0x56,
-0x34,
-0x12,
-0x8,
-0x50,
-0x30,
-0x45,
-0x5f,
-0xc,
-0x78,
-0x56,
-0x34,
-0x12,
-0x8,
-0x50,
-0x31,
-0x56,
-0x5f,
-0xa,
-0x12,
-0x8,
-0x50,
-0x31,
-0x53,
-0x5f,
-0x11,
-0xb,
-0xa,
-0x8,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x8,
-0x50,
-0x31,
-0x45,
-0x5f,
-0x11,
-0xb,
-0xa,
-0x8,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x8,
-0x50,
-0x31,
-0x4c,
-0x5f,
-0x11,
-0xb,
-0xa,
-0x8,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0,
-0x0
-};
-static unsigned char acpi_pci64_start[] = {
-0x4d
-};
-static unsigned char acpi_pci64_end[] = {
-0x5e
-};
-static unsigned char acpi_pci32_end[] = {
-0x39
-};
diff --git a/hw/i386/ssdt-pcihp.hex.generated b/hw/i386/ssdt-pcihp.hex.generated
deleted file mode 100644
index 72ffa84..0000000
--- a/hw/i386/ssdt-pcihp.hex.generated
+++ /dev/null
@@ -1,251 +0,0 @@
-static unsigned char ssdt_pcihp_name[] = {
-0x34
-};
-static unsigned char ssdt_pcivga_end[] = {
-0x99
-};
-static unsigned char ssdt_pcivga_name[] = {
-0x70
-};
-static unsigned char ssdt_pcihp_adr[] = {
-0x45
-};
-static unsigned char ssdt_pcinohp_end[] = {
-0x6d
-};
-static unsigned char ssdt_pcihp_end[] = {
-0x5c
-};
-static unsigned char ssdt_pciqxl_start[] = {
-0x99
-};
-static unsigned char ssdt_pcinohp_name[] = {
-0x5f
-};
-static unsigned char ssdp_pcihp_aml[] = {
-0x53,
-0x53,
-0x44,
-0x54,
-0xc6,
-0x0,
-0x0,
-0x0,
-0x1,
-0x70,
-0x42,
-0x58,
-0x50,
-0x43,
-0x0,
-0x0,
-0x42,
-0x58,
-0x53,
-0x53,
-0x44,
-0x54,
-0x50,
-0x43,
-0x1,
-0x0,
-0x0,
-0x0,
-0x49,
-0x4e,
-0x54,
-0x4c,
-0x15,
-0x11,
-0x13,
-0x20,
-0x10,
-0x41,
-0xa,
-0x5c,
-0x2e,
-0x5f,
-0x53,
-0x42,
-0x5f,
-0x50,
-0x43,
-0x49,
-0x30,
-0x5b,
-0x82,
-0x29,
-0x53,
-0x41,
-0x41,
-0x5f,
-0x8,
-0x5f,
-0x53,
-0x55,
-0x4e,
-0xa,
-0xaa,
-0x8,
-0x5f,
-0x41,
-0x44,
-0x52,
-0xc,
-0x0,
-0x0,
-0xaa,
-0x0,
-0x14,
-0x12,
-0x5f,
-0x45,
-0x4a,
-0x30,
-0x1,
-0x50,
-0x43,
-0x45,
-0x4a,
-0x42,
-0x53,
-0x45,
-0x4c,
-0x5f,
-0x53,
-0x55,
-0x4e,
-0x5b,
-0x82,
-0xf,
-0x53,
-0x42,
-0x42,
-0x5f,
-0x8,
-0x5f,
-0x41,
-0x44,
-0x52,
-0xc,
-0x0,
-0x0,
-0xaa,
-0x0,
-0x5b,
-0x82,
-0x2a,
-0x53,
-0x43,
-0x43,
-0x5f,
-0x8,
-0x5f,
-0x41,
-0x44,
-0x52,
-0xc,
-0x0,
-0x0,
-0xaa,
-0x0,
-0x14,
-0x8,
-0x5f,
-0x53,
-0x31,
-0x44,
-0x0,
-0xa4,
-0x0,
-0x14,
-0x8,
-0x5f,
-0x53,
-0x32,
-0x44,
-0x0,
-0xa4,
-0x0,
-0x14,
-0x8,
-0x5f,
-0x53,
-0x33,
-0x44,
-0x0,
-0xa4,
-0x0,
-0x5b,
-0x82,
-0x2b,
-0x53,
-0x44,
-0x44,
-0x5f,
-0x8,
-0x5f,
-0x41,
-0x44,
-0x52,
-0xc,
-0x0,
-0x0,
-0xaa,
-0x0,
-0x14,
-0x8,
-0x5f,
-0x53,
-0x31,
-0x44,
-0x0,
-0xa4,
-0x0,
-0x14,
-0x8,
-0x5f,
-0x53,
-0x32,
-0x44,
-0x0,
-0xa4,
-0x0,
-0x14,
-0x9,
-0x5f,
-0x53,
-0x33,
-0x44,
-0x0,
-0xa4,
-0xa,
-0x3
-};
-static unsigned char ssdt_pciqxl_adr[] = {
-0xa6
-};
-static unsigned char ssdt_pcinohp_adr[] = {
-0x69
-};
-static unsigned char ssdt_pcivga_adr[] = {
-0x7a
-};
-static unsigned char ssdt_pciqxl_name[] = {
-0x9c
-};
-static unsigned char ssdt_pcivga_start[] = {
-0x6d
-};
-static unsigned char ssdt_pciqxl_end[] = {
-0xc6
-};
-static unsigned char ssdt_pcihp_start[] = {
-0x31
-};
-static unsigned char ssdt_pcihp_id[] = {
-0x3e
-};
-static unsigned char ssdt_pcinohp_start[] = {
-0x5c
-};
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Qemu-devel] [PATCH v5 16/16] acpi: make build_*() routines static to aml-build.c
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
` (14 preceding siblings ...)
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 15/16] pc: acpi: remove not used anymore ssdt-[misc|pcihp].hex.generated blobs Igor Mammedov
@ 2015-02-20 18:22 ` Igor Mammedov
15 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-20 18:22 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, mst
build_*() routines were used for composing AML
structures manually in acpi-build.c but after
conversion to AML API they are not used outside
of aml-build.c anymore, so hide them from external
users.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
hw/acpi/aml-build.c | 20 ++++++++++----------
include/hw/acpi/aml-build.h | 16 ----------------
2 files changed, 10 insertions(+), 26 deletions(-)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 60245e7..3e5949b 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -27,27 +27,27 @@
#include "hw/acpi/aml-build.h"
#include "qemu/bswap.h"
-GArray *build_alloc_array(void)
+static GArray *build_alloc_array(void)
{
return g_array_new(false, true /* clear */, 1);
}
-void build_free_array(GArray *array)
+static void build_free_array(GArray *array)
{
g_array_free(array, true);
}
-void build_prepend_byte(GArray *array, uint8_t val)
+static void build_prepend_byte(GArray *array, uint8_t val)
{
g_array_prepend_val(array, val);
}
-void build_append_byte(GArray *array, uint8_t val)
+static void build_append_byte(GArray *array, uint8_t val)
{
g_array_append_val(array, val);
}
-void build_append_array(GArray *array, GArray *val)
+static void build_append_array(GArray *array, GArray *val)
{
g_array_append_vals(array, val->data, val->len);
}
@@ -141,7 +141,7 @@ build_append_namestringv(GArray *array, const char *format, va_list ap)
g_strfreev(segs);
}
-void build_append_namestring(GArray *array, const char *format, ...)
+static void build_append_namestring(GArray *array, const char *format, ...)
{
va_list ap;
@@ -158,7 +158,7 @@ enum {
PACKAGE_LENGTH_4BYTE_SHIFT = 20,
};
-void
+static void
build_prepend_package_length(GArray *package, unsigned length, bool incl_self)
{
uint8_t byte;
@@ -226,13 +226,13 @@ build_append_pkg_length(GArray *array, unsigned length, bool incl_self)
build_free_array(tmp);
}
-void build_package(GArray *package, uint8_t op)
+static void build_package(GArray *package, uint8_t op)
{
build_prepend_package_length(package, package->len, true);
build_prepend_byte(package, op);
}
-void build_extop_package(GArray *package, uint8_t op)
+static void build_extop_package(GArray *package, uint8_t op)
{
build_package(package, op);
build_prepend_byte(package, 0x5B); /* ExtOpPrefix */
@@ -248,7 +248,7 @@ static void build_append_int_noprefix(GArray *table, uint64_t value, int size)
}
}
-void build_append_int(GArray *table, uint64_t value)
+static void build_append_int(GArray *table, uint64_t value)
{
if (value == 0x00) {
build_append_byte(table, 0x00); /* ZeroOp */
diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
index 1187197..f6735ea 100644
--- a/include/hw/acpi/aml-build.h
+++ b/include/hw/acpi/aml-build.h
@@ -188,20 +188,4 @@ Aml *aml_resource_template(void);
Aml *aml_field(const char *name, AmlFieldFlags flags);
Aml *aml_varpackage(uint32_t num_elements);
-/* other helpers */
-GArray *build_alloc_array(void);
-void build_free_array(GArray *array);
-void build_prepend_byte(GArray *array, uint8_t val);
-void build_append_byte(GArray *array, uint8_t val);
-void build_append_array(GArray *array, GArray *val);
-
-void GCC_FMT_ATTR(2, 3)
-build_append_namestring(GArray *array, const char *format, ...);
-
-void
-build_prepend_package_length(GArray *package, unsigned length, bool incl_self);
-void build_package(GArray *package, uint8_t op);
-void build_append_int(GArray *table, uint64_t value);
-void build_extop_package(GArray *package, uint8_t op);
-
#endif
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [Qemu-devel] [PATCH v5 08/16] pc: acpi-build: drop template patching and create Device(SMC) dynamically
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 08/16] pc: acpi-build: drop template patching and create Device(SMC) dynamically Igor Mammedov
@ 2015-02-26 16:33 ` Igor Mammedov
0 siblings, 0 replies; 18+ messages in thread
From: Igor Mammedov @ 2015-02-26 16:33 UTC (permalink / raw)
To: qemu-devel; +Cc: marcel, Reza Jelveh, mst
On Fri, 20 Feb 2015 18:22:12 +0000
Igor Mammedov <imammedo@redhat.com> wrote:
> patch moves SMC device into SSDT and creates it only
> when device is present, which makes ACPI tables smaller
> in default case when device is not present.
>
> Also it fixes wrong IO range in CRS if "iobase"
> property is set to a non default value.
Reza could check that patch doesn't break OSX pls?
>
> PS:
> Testing with XP shows that current default "iobase"
> used SMC device conflicts with floppy controller IO,
> but it's topic for another patch and I'd leave it
> to SMC device author for resolving conflict.
>
> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
> CC: agraf@suse.de
> ---
> hw/i386/acpi-build.c | 29 ++++++++++++++++++++++-------
> hw/i386/acpi-dsdt-isa.dsl | 11 -----------
> hw/i386/acpi-dsdt.dsl | 1 -
> hw/i386/q35-acpi-dsdt.dsl | 1 -
> 4 files changed, 22 insertions(+), 20 deletions(-)
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index badfa73..05eb80a 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -116,6 +116,7 @@ typedef struct AcpiMiscInfo {
> const unsigned char *dsdt_code;
> unsigned dsdt_size;
> uint16_t pvpanic_port;
> + uint16_t applesmc_io_base;
> } AcpiMiscInfo;
>
> typedef struct AcpiBuildPciBusHotplugState {
> @@ -127,7 +128,6 @@ typedef struct AcpiBuildPciBusHotplugState {
>
> static void acpi_get_dsdt(AcpiMiscInfo *info)
> {
> - uint16_t *applesmc_sta;
> Object *piix = piix4_pm_find();
> Object *lpc = ich9_lpc_find();
> assert(!!piix != !!lpc);
> @@ -135,17 +135,11 @@ static void acpi_get_dsdt(AcpiMiscInfo *info)
> if (piix) {
> info->dsdt_code = AcpiDsdtAmlCode;
> info->dsdt_size = sizeof AcpiDsdtAmlCode;
> - applesmc_sta = piix_dsdt_applesmc_sta;
> }
> if (lpc) {
> info->dsdt_code = Q35AcpiDsdtAmlCode;
> info->dsdt_size = sizeof Q35AcpiDsdtAmlCode;
> - applesmc_sta = q35_dsdt_applesmc_sta;
> }
> -
> - /* Patch in appropriate value for AppleSMC _STA */
> - *(uint8_t *)(info->dsdt_code + *applesmc_sta) =
> - applesmc_port() ? 0x0b : 0x00;
> }
>
> static
> @@ -248,6 +242,7 @@ static void acpi_get_misc_info(AcpiMiscInfo *info)
> info->has_hpet = hpet_find();
> info->has_tpm = tpm_find();
> info->pvpanic_port = pvpanic_port();
> + info->applesmc_io_base = applesmc_port();
> }
>
> static void acpi_get_pci_info(PcPciInfo *info)
> @@ -955,6 +950,26 @@ build_ssdt(GArray *table_data, GArray *linker,
> aml_append(scope, aml_name_decl("_S5", pkg));
> aml_append(ssdt, scope);
>
> + if (misc->applesmc_io_base) {
> + scope = aml_scope("\\_SB.PCI0.ISA");
> + dev = aml_device("SMC");
> +
> + aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0001")));
> + /* device present, functioning, decoding, not shown in UI */
> + aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
> +
> + crs = aml_resource_template();
> + aml_append(crs,
> + aml_io(aml_decode16, misc->applesmc_io_base, misc->applesmc_io_base,
> + 0x01, APPLESMC_MAX_DATA_LENGTH)
> + );
> + aml_append(crs, aml_irq_no_flags(6));
> + aml_append(dev, aml_name_decl("_CRS", crs));
> +
> + aml_append(scope, dev);
> + aml_append(ssdt, scope);
> + }
> +
> if (misc->pvpanic_port) {
> scope = aml_scope("\\_SB.PCI0.ISA");
>
> diff --git a/hw/i386/acpi-dsdt-isa.dsl b/hw/i386/acpi-dsdt-isa.dsl
> index deb37de..89caa16 100644
> --- a/hw/i386/acpi-dsdt-isa.dsl
> +++ b/hw/i386/acpi-dsdt-isa.dsl
> @@ -16,17 +16,6 @@
> /* Common legacy ISA style devices. */
> Scope(\_SB.PCI0.ISA) {
>
> - Device (SMC) {
> - Name(_HID, EisaId("APP0001"))
> - /* _STA will be patched to 0x0B if AppleSMC is present */
> - ACPI_EXTRACT_NAME_BYTE_CONST DSDT_APPLESMC_STA
> - Name(_STA, 0xF0)
> - Name(_CRS, ResourceTemplate () {
> - IO (Decode16, 0x0300, 0x0300, 0x01, 0x20)
> - IRQNoFlags() { 6 }
> - })
> - }
> -
> Device(RTC) {
> Name(_HID, EisaId("PNP0B00"))
> Name(_CRS, ResourceTemplate() {
> diff --git a/hw/i386/acpi-dsdt.dsl b/hw/i386/acpi-dsdt.dsl
> index 09b68f0..a2d84ec 100644
> --- a/hw/i386/acpi-dsdt.dsl
> +++ b/hw/i386/acpi-dsdt.dsl
> @@ -85,7 +85,6 @@ DefinitionBlock (
> }
> }
>
> -#define DSDT_APPLESMC_STA piix_dsdt_applesmc_sta
> #include "acpi-dsdt-isa.dsl"
>
>
> diff --git a/hw/i386/q35-acpi-dsdt.dsl b/hw/i386/q35-acpi-dsdt.dsl
> index 3fb4b2f..16eaca3 100644
> --- a/hw/i386/q35-acpi-dsdt.dsl
> +++ b/hw/i386/q35-acpi-dsdt.dsl
> @@ -150,7 +150,6 @@ DefinitionBlock (
> }
> }
>
> -#define DSDT_APPLESMC_STA q35_dsdt_applesmc_sta
> #include "acpi-dsdt-isa.dsl"
>
>
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2015-02-26 16:33 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-02-20 18:22 [Qemu-devel] [PATCH v5 00/16] ACPI refactoring: replace template patching with C AML API Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 01/16] pc: acpi-build: create PCI0._CRS dynamically Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 02/16] pc: acpi: drop manual hole punching for PCI hotplug resources Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 03/16] pc: acpi: drop manual hole punching for CPU " Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 04/16] pc: acpi: drop manual hole punching for GPE0 resources Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 05/16] pc: acpi-build: drop remaining ssdt_misc template Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 06/16] acpi: add acpi_irq_no_flags() term Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 07/16] pc: export applesmc IO port/len Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 08/16] pc: acpi-build: drop template patching and create Device(SMC) dynamically Igor Mammedov
2015-02-26 16:33 ` Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 09/16] tests: ACPI test blobs update due to PCI0._CRS changes Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 10/16] tests: bios-tables-test: add support for testing bridges Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 11/16] tests: add ACPI blobs for qemu with bridge cases Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 12/16] pc: acpi-build: simplify PCI bus tree generation Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 13/16] tests: ACPI: update pc/SSDT.bridge due to new alg of PCI tree creation Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 14/16] pc: acpi-build: drop template patching and create PCI bus tree dynamically Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 15/16] pc: acpi: remove not used anymore ssdt-[misc|pcihp].hex.generated blobs Igor Mammedov
2015-02-20 18:22 ` [Qemu-devel] [PATCH v5 16/16] acpi: make build_*() routines static to aml-build.c Igor Mammedov
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