From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53347) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YRKgj-0000rr-Jc for qemu-devel@nongnu.org; Fri, 27 Feb 2015 08:10:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YRKgd-0004id-EB for qemu-devel@nongnu.org; Fri, 27 Feb 2015 08:10:41 -0500 Received: from mail.ispras.ru ([83.149.199.45]:34626) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YRKgd-0004iX-7m for qemu-devel@nongnu.org; Fri, 27 Feb 2015 08:10:35 -0500 From: Pavel Dovgalyuk Date: Fri, 27 Feb 2015 16:10:39 +0300 Message-ID: <20150227131039.11912.43831.stgit@PASHA-ISP> In-Reply-To: <20150227130939.11912.50660.stgit@PASHA-ISP> References: <20150227130939.11912.50660.stgit@PASHA-ISP> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [RFC PATCH v10 09/24] i386: interrupt poll processing List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, alex.bennee@linaro.org, mark.burton@greensocs.com, real@ispras.ru, batuzovk@ispras.ru, maria.klimushenkova@ispras.ru, pavel.dovgaluk@ispras.ru, pbonzini@redhat.com, afaerber@suse.de, fred.konrad@greensocs.com This patch updates x86_cpu_exec_interrupt function. It can process two interrupt request at a time (poll and another one). This makes its execution non-deterministic. Determinism is requred for recorded icount execution. Signed-off-by: Pavel Dovgalyuk --- target-i386/seg_helper.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index fa374d0..235bb12 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -1294,6 +1294,9 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request) if (interrupt_request & CPU_INTERRUPT_POLL) { cs->interrupt_request &= ~CPU_INTERRUPT_POLL; apic_poll_irq(cpu->apic_state); + /* Don't process multiple interrupt requests in a single call. + This is required to make icount-driven execution deterministic. */ + return true; } #endif if (interrupt_request & CPU_INTERRUPT_SIPI) {