From: Stefan Hajnoczi <stefanha@redhat.com>
To: Jiri Pirko <jiri@resnulli.us>
Cc: sfeldma@gmail.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [patch qemu] rocker: fix 32bit build
Date: Fri, 27 Feb 2015 16:48:43 +0000 [thread overview]
Message-ID: <20150227164843.GA32542@stefanha-thinkpad.redhat.com> (raw)
In-Reply-To: <1425046037-2092-1-git-send-email-jiri@resnulli.us>
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On Fri, Feb 27, 2015 at 03:07:17PM +0100, Jiri Pirko wrote:
> For printf format of uint64_t and size_t use TARGET_FMT_plx and %zu
>
> Signed-off-by: Jiri Pirko <jiri@resnulli.us>
> ---
> hw/net/rocker/rocker.c | 32 +++++++++++++++++---------------
> hw/net/rocker/rocker_desc.c | 6 +++---
> 2 files changed, 20 insertions(+), 18 deletions(-)
Thanks!
In the future, please send a new revision of the original series instead
of a fix-up patch. Adding a patch on top will break git-bisect(1) since
there are a couple of commits with the build failure before your fix.
I am squashing this into the "rocker: add new rocker switch device"
commit so that git-bisect(1) continues to work.
> diff --git a/hw/net/rocker/rocker.c b/hw/net/rocker/rocker.c
> index 672cf5a..4105275 100644
> --- a/hw/net/rocker/rocker.c
> +++ b/hw/net/rocker/rocker.c
> @@ -774,8 +774,8 @@ static void rocker_io_writel(void *opaque, hwaddr addr, uint32_t val)
> }
> break;
> default:
> - DPRINTF("not implemented dma reg write(l) addr=0x%lx "
> - "val=0x%08x (ring %d, addr=0x%02x)\n",
> + DPRINTF("not implemented dma reg write(l) addr=0x" TARGET_FMT_plx
> + " val=0x%08x (ring %d, addr=0x%02x)\n",
> addr, val, index, offset);
> break;
> }
> @@ -816,7 +816,8 @@ static void rocker_io_writel(void *opaque, hwaddr addr, uint32_t val)
> r->lower32 = 0;
> break;
> default:
> - DPRINTF("not implemented write(l) addr=0x%lx val=0x%08x\n", addr, val);
> + DPRINTF("not implemented write(l) addr=0x" TARGET_FMT_plx
> + " val=0x%08x\n", addr, val);
> break;
> }
> }
> @@ -834,8 +835,8 @@ static void rocker_io_writeq(void *opaque, hwaddr addr, uint64_t val)
> desc_ring_set_base_addr(r->rings[index], val);
> break;
> default:
> - DPRINTF("not implemented dma reg write(q) addr=0x%lx "
> - "val=0x%016lx (ring %d, offset=0x%02x)\n",
> + DPRINTF("not implemented dma reg write(q) addr=0x" TARGET_FMT_plx
> + " val=0x" TARGET_FMT_plx " (ring %d, offset=0x%02x)\n",
> addr, val, index, offset);
> break;
> }
> @@ -853,8 +854,8 @@ static void rocker_io_writeq(void *opaque, hwaddr addr, uint64_t val)
> rocker_port_phys_enable_write(r, val);
> break;
> default:
> - DPRINTF("not implemented write(q) addr=0x%lx val=0x%016lx\n",
> - addr, val);
> + DPRINTF("not implemented write(q) addr=0x" TARGET_FMT_plx
> + " val=0x" TARGET_FMT_plx "\n", addr, val);
> break;
> }
> }
> @@ -945,7 +946,8 @@ static const char *rocker_reg_name(void *opaque, hwaddr addr)
> static void rocker_mmio_write(void *opaque, hwaddr addr, uint64_t val,
> unsigned size)
> {
> - DPRINTF("Write %s addr %lx, size %u, val %lx\n",
> + DPRINTF("Write %s addr " TARGET_FMT_plx
> + ", size %u, val " TARGET_FMT_plx "\n",
> rocker_reg_name(opaque, addr), addr, size, val);
>
> switch (size) {
> @@ -1017,8 +1019,8 @@ static uint32_t rocker_io_readl(void *opaque, hwaddr addr)
> ret = desc_ring_get_credits(r->rings[index]);
> break;
> default:
> - DPRINTF("not implemented dma reg read(l) addr=0x%lx "
> - "(ring %d, addr=0x%02x)\n", addr, index, offset);
> + DPRINTF("not implemented dma reg read(l) addr=0x" TARGET_FMT_plx
> + " (ring %d, addr=0x%02x)\n", addr, index, offset);
> ret = 0;
> break;
> }
> @@ -1072,7 +1074,7 @@ static uint32_t rocker_io_readl(void *opaque, hwaddr addr)
> ret = (uint32_t)(r->switch_id >> 32);
> break;
> default:
> - DPRINTF("not implemented read(l) addr=0x%lx\n", addr);
> + DPRINTF("not implemented read(l) addr=0x" TARGET_FMT_plx "\n", addr);
> ret = 0;
> break;
> }
> @@ -1093,8 +1095,8 @@ static uint64_t rocker_io_readq(void *opaque, hwaddr addr)
> ret = desc_ring_get_base_addr(r->rings[index]);
> break;
> default:
> - DPRINTF("not implemented dma reg read(q) addr=0x%lx "
> - "(ring %d, addr=0x%02x)\n", addr, index, offset);
> + DPRINTF("not implemented dma reg read(q) addr=0x" TARGET_FMT_plx
> + " (ring %d, addr=0x%02x)\n", addr, index, offset);
> ret = 0;
> break;
> }
> @@ -1122,7 +1124,7 @@ static uint64_t rocker_io_readq(void *opaque, hwaddr addr)
> ret = r->switch_id;
> break;
> default:
> - DPRINTF("not implemented read(q) addr=0x%lx\n", addr);
> + DPRINTF("not implemented read(q) addr=0x" TARGET_FMT_plx "\n", addr);
> ret = 0;
> break;
> }
> @@ -1131,7 +1133,7 @@ static uint64_t rocker_io_readq(void *opaque, hwaddr addr)
>
> static uint64_t rocker_mmio_read(void *opaque, hwaddr addr, unsigned size)
> {
> - DPRINTF("Read %s addr %lx, size %u\n",
> + DPRINTF("Read %s addr " TARGET_FMT_plx ", size %u\n",
> rocker_reg_name(opaque, addr), addr, size);
>
> switch (size) {
> diff --git a/hw/net/rocker/rocker_desc.c b/hw/net/rocker/rocker_desc.c
> index 83c2b98..0a6dfae 100644
> --- a/hw/net/rocker/rocker_desc.c
> +++ b/hw/net/rocker/rocker_desc.c
> @@ -83,7 +83,7 @@ int desc_set_buf(DescInfo *info, size_t tlv_size)
>
> if (tlv_size > info->buf_size) {
> DPRINTF("ERROR: trying to write more to desc buf than it "
> - "can hold buf_size %ld tlv_size %ld\n",
> + "can hold buf_size %zu tlv_size %zu\n",
> info->buf_size, tlv_size);
> return -ROCKER_EMSGSIZE;
> }
> @@ -112,8 +112,8 @@ static bool desc_ring_empty(DescRing *ring)
> bool desc_ring_set_base_addr(DescRing *ring, uint64_t base_addr)
> {
> if (base_addr & 0x7) {
> - DPRINTF("ERROR: ring[%d] desc base addr (0x%lx) not 8-byte aligned\n",
> - ring->index, base_addr);
> + DPRINTF("ERROR: ring[%d] desc base addr (0x" TARGET_FMT_plx
> + ") not 8-byte aligned\n", ring->index, base_addr);
> return false;
> }
>
> --
> 1.9.3
>
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prev parent reply other threads:[~2015-02-27 16:48 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-27 14:07 [Qemu-devel] [patch qemu] rocker: fix 32bit build Jiri Pirko
2015-02-27 16:48 ` Stefan Hajnoczi [this message]
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