From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36859) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVylZ-0004dT-3I for qemu-devel@nongnu.org; Thu, 12 Mar 2015 04:46:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YVylV-0008RV-OS for qemu-devel@nongnu.org; Thu, 12 Mar 2015 04:46:53 -0400 Received: from e06smtp11.uk.ibm.com ([195.75.94.107]:42892) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVylV-0008RN-E6 for qemu-devel@nongnu.org; Thu, 12 Mar 2015 04:46:49 -0400 Received: from /spool/local by e06smtp11.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 12 Mar 2015 08:46:47 -0000 Received: from b06cxnps4075.portsmouth.uk.ibm.com (d06relay12.portsmouth.uk.ibm.com [9.149.109.197]) by d06dlp03.portsmouth.uk.ibm.com (Postfix) with ESMTP id 2FA421B0804B for ; Thu, 12 Mar 2015 08:47:07 +0000 (GMT) Received: from d06av04.portsmouth.uk.ibm.com (d06av04.portsmouth.uk.ibm.com [9.149.37.216]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t2C8kknv53477498 for ; Thu, 12 Mar 2015 08:46:46 GMT Received: from d06av04.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av04.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t2C8kiQn026990 for ; Thu, 12 Mar 2015 02:46:45 -0600 Date: Thu, 12 Mar 2015 09:46:44 +0100 From: Frank Blaschka Message-ID: <20150312084644.GA29840@tuxmaker.boeblingen.de.ibm.com> References: <1425992614-8938-1-git-send-email-blaschka@linux.vnet.ibm.com> <1425992614-8938-3-git-send-email-blaschka@linux.vnet.ibm.com> <20150310152144-mutt-send-email-mst@redhat.com> <20150311143844.GA9483@tuxmaker.boeblingen.de.ibm.com> <20150311154551-mutt-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20150311154551-mutt-send-email-mst@redhat.com> Subject: Re: [Qemu-devel] [PATCH 2/2 RFC] s390x/pci: rework pci infrastructure modeling List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: MIHAJLOV@de.ibm.com, qemu-devel@nongnu.org, agraf@suse.de, borntraeger@de.ibm.com, fiuczy@linux.vnet.ibm.com, cornelia.huck@de.ibm.com On Wed, Mar 11, 2015 at 03:57:05PM +0100, Michael S. Tsirkin wrote: > On Wed, Mar 11, 2015 at 03:38:44PM +0100, Frank Blaschka wrote: > > I like Alex's idea because: > > 1) It reflects pretty well the actual nature of the pci system in real s390 hw > > why do you say this? does real hw has this > one device per bridge limit? > Actually we don't know. HW does not expose this information. All we know is each pci function is completely separated. So it is a good assumption to have a separate bridge/bus for each pci function. By the way the Linux kernel for s390 makes the same assumption by creating a new pci domain for each function. You may want to read the cover letter again to get more technical details on this.