From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52515) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVzO9-00077b-GY for qemu-devel@nongnu.org; Thu, 12 Mar 2015 05:26:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YVzO6-000886-1B for qemu-devel@nongnu.org; Thu, 12 Mar 2015 05:26:45 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58177) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVzO5-00087M-PG for qemu-devel@nongnu.org; Thu, 12 Mar 2015 05:26:41 -0400 Date: Thu, 12 Mar 2015 10:26:29 +0100 From: "Michael S. Tsirkin" Message-ID: <20150312092629.GA4471@redhat.com> References: <1425992614-8938-1-git-send-email-blaschka@linux.vnet.ibm.com> <1425992614-8938-3-git-send-email-blaschka@linux.vnet.ibm.com> <20150310152144-mutt-send-email-mst@redhat.com> <20150311143844.GA9483@tuxmaker.boeblingen.de.ibm.com> <20150311154551-mutt-send-email-mst@redhat.com> <20150312084644.GA29840@tuxmaker.boeblingen.de.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20150312084644.GA29840@tuxmaker.boeblingen.de.ibm.com> Subject: Re: [Qemu-devel] [PATCH 2/2 RFC] s390x/pci: rework pci infrastructure modeling List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Frank Blaschka Cc: MIHAJLOV@de.ibm.com, qemu-devel@nongnu.org, agraf@suse.de, borntraeger@de.ibm.com, fiuczy@linux.vnet.ibm.com, cornelia.huck@de.ibm.com On Thu, Mar 12, 2015 at 09:46:44AM +0100, Frank Blaschka wrote: > On Wed, Mar 11, 2015 at 03:57:05PM +0100, Michael S. Tsirkin wrote: > > On Wed, Mar 11, 2015 at 03:38:44PM +0100, Frank Blaschka wrote: > > > I like Alex's idea because: > > > 1) It reflects pretty well the actual nature of the pci system in real s390 hw > > > > why do you say this? does real hw has this > > one device per bridge limit? > > > Actually we don't know. HW does not expose this information. All we know is each > pci function is completely separated. So it is a good assumption to have a separate > bridge/bus for each pci function. By the way the Linux kernel for s390 makes the > same assumption by creating a new pci domain for each function. You may want > to read the cover letter again to get more technical details on this. I'm sorry, my question wasn't clear. I'll try to rephrase. Imagine that I'm using s390, and I add a pci to pci bridge: -device s390-pcihost,fid=17,uid=2217,id=mydev -device ne2k_pci,bus=mydev.0,addr=0 -device pci-bridge,chassis_nr=2,bus=bus=mydev.0,addr=0,id=newdev -device ne2k_pci,bus=newdev,addr=8 What happens with your scheme then? It seems reasonable to assume that this is a legal configuration on real hardware. -- MST