From: "Michael S. Tsirkin" <mst@redhat.com>
To: Jason Wang <jasowang@redhat.com>
Cc: cornelia.huck@de.ibm.com, Keith Busch <keith.busch@intel.com>,
Stefan Hajnoczi <stefanha@redhat.com>,
qemu-devel@nongnu.org, Kevin Wolf <kwolf@redhat.com>
Subject: Re: [Qemu-devel] [PATCH V4 18/19] pci: remove hard-coded bar size in msix_init_exclusive_bar()
Date: Thu, 19 Mar 2015 11:09:20 +0100 [thread overview]
Message-ID: <20150319110319-mutt-send-email-mst@redhat.com> (raw)
In-Reply-To: <1426742363.5002.2@smtp.corp.redhat.com>
On Thu, Mar 19, 2015 at 01:19:23PM +0800, Jason Wang wrote:
>
>
> On Wed, Mar 18, 2015 at 8:52 PM, Michael S. Tsirkin <mst@redhat.com> wrote:
> >On Wed, Mar 18, 2015 at 05:35:08PM +0800, Jason Wang wrote:
> >> This patch let msix_init_exclusive_bar() can accept bar_size parameter
> >> other than a hard-coded limit 4096. Then caller can specify a bar_size
> >> depends on msix entries and can use up to 2048 msix entries as PCI
> >> spec allows. To keep migration compatibility, 4096 is used for all
> >> callers and pba were start from half of bar size.
> >> Cc: Keith Busch <keith.busch@intel.com>
> >> Cc: Kevin Wolf <kwolf@redhat.com>
> >> Cc: Stefan Hajnoczi <stefanha@redhat.com>
> >> Cc: Michael S. Tsirkin <mst@redhat.com>
> >> Signed-off-by: Jason Wang <jasowang@redhat.com>
> >
> >Hmm this API looks strange. Caller will then have to have
> >msi specific knowledge.
> >Can't we keep the size iternal to msix.c?
>
> Looks like we can, but still need an extra parameter e.g a boolean
> compat_size to let msix_init_exclusive_bar() to use 4096 as bar size.
Why not just figure the size out from # of vectors?
> >
> >
> >> ---
> >> hw/block/nvme.c | 2 +-
> >> hw/misc/ivshmem.c | 2 +-
> >> hw/pci/msix.c | 18 +++++++-----------
> >> hw/virtio/virtio-pci.c | 2 +-
> >> include/hw/pci/msix.h | 2 +-
> >> 5 files changed, 11 insertions(+), 15 deletions(-)
> >> diff --git a/hw/block/nvme.c b/hw/block/nvme.c
> >> index 0f3dfb9..09d7884 100644
> >> --- a/hw/block/nvme.c
> >> +++ b/hw/block/nvme.c
> >> @@ -787,7 +787,7 @@ static int nvme_init(PCIDevice *pci_dev)
> >> pci_register_bar(&n->parent_obj, 0,
> >> PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64,
> >> &n->iomem);
> >> - msix_init_exclusive_bar(&n->parent_obj, n->num_queues, 4);
> >> + msix_init_exclusive_bar(&n->parent_obj, n->num_queues, 4, 4096);
> >> id->vid = cpu_to_le16(pci_get_word(pci_conf + PCI_VENDOR_ID));
> >> id->ssvid = cpu_to_le16(pci_get_word(pci_conf +
> >>PCI_SUBSYSTEM_VENDOR_ID));
> >> diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
> >> index 5d272c8..3e2a2d4 100644
> >> --- a/hw/misc/ivshmem.c
> >> +++ b/hw/misc/ivshmem.c
> >> @@ -631,7 +631,7 @@ static uint64_t ivshmem_get_size(IVShmemState * s)
> >>{
> >> static void ivshmem_setup_msi(IVShmemState * s)
> >> {
> >> - if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1)) {
> >> + if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1, 4096)) {
> >> IVSHMEM_DPRINTF("msix initialization failed\n");
> >> exit(1);
> >> }
> >> diff --git a/hw/pci/msix.c b/hw/pci/msix.c
> >> index 24de260..9a1894f 100644
> >> --- a/hw/pci/msix.c
> >> +++ b/hw/pci/msix.c
> >> @@ -291,33 +291,29 @@ int msix_init(struct PCIDevice *dev, unsigned
> >>short nentries,
> >> }
> >> int msix_init_exclusive_bar(PCIDevice *dev, unsigned short
> >>nentries,
> >> - uint8_t bar_nr)
> >> + uint8_t bar_nr, uint32_t bar_size)
> >> {
> >> int ret;
> >> char *name;
> >> + uint32_t bar_pba_offset = bar_size / 2;
> >
> >Spec says we must give BIR 4k of it's own, but for
> >larger BARs, using up half the BAR just for BIR seems
> >wasteful.
>
> I see, I will make PBA size more accurate.
>
> >
> >
> >> /*
> >> * Migration compatibility dictates that this remains a 4k
> >> * BAR with the vector table in the lower half and PBA in
> >> * the upper half. Do not use these elsewhere!
> >> */
> >
> >You've left comment here where it no longer makes
> >any sense.
>
> Will remove this.
>
> >
> >
> >> -#define MSIX_EXCLUSIVE_BAR_SIZE 4096
> >> -#define MSIX_EXCLUSIVE_BAR_TABLE_OFFSET 0
> >> -#define MSIX_EXCLUSIVE_BAR_PBA_OFFSET (MSIX_EXCLUSIVE_BAR_SIZE / 2)
> >> -#define MSIX_EXCLUSIVE_CAP_OFFSET 0
> >> -
> >> - if (nentries * PCI_MSIX_ENTRY_SIZE >
> >>MSIX_EXCLUSIVE_BAR_PBA_OFFSET) {
> >> + if (nentries * PCI_MSIX_ENTRY_SIZE > bar_pba_offset) {
> >> return -EINVAL;
> >> }
> >> name = g_strdup_printf("%s-msix", dev->name);
> >> - memory_region_init(&dev->msix_exclusive_bar, OBJECT(dev), name,
> >>MSIX_EXCLUSIVE_BAR_SIZE);
> >> + memory_region_init(&dev->msix_exclusive_bar, OBJECT(dev), name,
> >>bar_size);
> >> g_free(name);
> >> ret = msix_init(dev, nentries, &dev->msix_exclusive_bar,
> >>bar_nr,
> >> - MSIX_EXCLUSIVE_BAR_TABLE_OFFSET,
> >>&dev->msix_exclusive_bar,
> >> - bar_nr, MSIX_EXCLUSIVE_BAR_PBA_OFFSET,
> >> - MSIX_EXCLUSIVE_CAP_OFFSET);
> >> + 0, &dev->msix_exclusive_bar,
> >> + bar_nr, bar_pba_offset,
> >> + 0);
> >> if (ret) {
> >> return ret;
> >> }
> >> diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
> >> index 02e3ce8..4a5febb 100644
> >> --- a/hw/virtio/virtio-pci.c
> >> +++ b/hw/virtio/virtio-pci.c
> >> @@ -937,7 +937,7 @@ static void virtio_pci_device_plugged(DeviceState
> >>*d)
> >> config[PCI_INTERRUPT_PIN] = 1;
> >> if (proxy->nvectors &&
> >> - msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors, 1))
> >>{
> >> + msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors, 1,
> >>4096)) {
> >> error_report("unable to init msix vectors to %" PRIu32,
> >> proxy->nvectors);
> >> proxy->nvectors = 0;
> >> diff --git a/include/hw/pci/msix.h b/include/hw/pci/msix.h
> >> index 954d82b..43edebc 100644
> >> --- a/include/hw/pci/msix.h
> >> +++ b/include/hw/pci/msix.h
> >> @@ -11,7 +11,7 @@ int msix_init(PCIDevice *dev, unsigned short
> >>nentries,
> >> unsigned table_offset, MemoryRegion *pba_bar,
> >> uint8_t pba_bar_nr, unsigned pba_offset, uint8_t
> >>cap_pos);
> >> int msix_init_exclusive_bar(PCIDevice *dev, unsigned short nentries,
> >> - uint8_t bar_nr);
> >> + uint8_t bar_nr, uint32_t bar_size);
> >> void msix_write_config(PCIDevice *dev, uint32_t address, uint32_t
> >>val, int len);
> >> -- 2.1.0
next prev parent reply other threads:[~2015-03-19 10:09 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-18 9:34 [Qemu-devel] [PATCH V4 00/19] Support more virtio queues Jason Wang
2015-03-18 9:34 ` [Qemu-devel] [PATCH V4 01/19] pc: add 2.4 machine types Jason Wang
2015-03-18 9:34 ` [Qemu-devel] [PATCH V4 02/19] spapr: add machine type specific instance init function Jason Wang
2015-03-18 9:34 ` [Qemu-devel] [PATCH V4 03/19] ppc: spapr: add 2.4 machine type Jason Wang
2015-03-18 9:34 ` [Qemu-devel] [PATCH V4 04/19] monitor: replace the magic number 255 with MAX_QUEUE_NUM Jason Wang
2015-03-18 9:34 ` [Qemu-devel] [PATCH V4 05/19] monitor: check return value of qemu_find_net_clients_except() Jason Wang
2015-03-18 9:34 ` [Qemu-devel] [PATCH V4 06/19] virtio-ccw: using VIRTIO_NO_VECTOR instead of 0 for invalid virtqueue Jason Wang
2015-03-18 13:08 ` Michael S. Tsirkin
2015-03-20 7:39 ` Cornelia Huck
2015-03-21 18:27 ` Michael S. Tsirkin
2015-03-23 9:02 ` Cornelia Huck
2015-03-18 9:34 ` [Qemu-devel] [PATCH V4 07/19] virtio-net: validate backend queue numbers against bus limitation Jason Wang
2015-03-18 13:05 ` Michael S. Tsirkin
2015-03-19 5:26 ` Jason Wang
2015-03-18 9:34 ` [Qemu-devel] [PATCH V4 08/19] virtio-net: fix the upper bound when trying to delete queues Jason Wang
2015-03-18 13:06 ` Michael S. Tsirkin
2015-03-19 5:28 ` Jason Wang
2015-03-18 9:34 ` [Qemu-devel] [PATCH V4 09/19] virito: introduce bus specific queue limit Jason Wang
2015-03-20 10:20 ` Cornelia Huck
2015-03-31 2:34 ` Jason Wang
2015-03-18 9:35 ` [Qemu-devel] [PATCH V4 10/19] virtio-ccw: introduce ccw " Jason Wang
2015-03-20 11:33 ` Cornelia Huck
2015-03-31 2:36 ` Jason Wang
2015-03-18 9:35 ` [Qemu-devel] [PATCH V4 11/19] virtio-s390: switch to bus " Jason Wang
2015-03-20 11:34 ` Cornelia Huck
2015-03-18 9:35 ` [Qemu-devel] [PATCH V4 12/19] virtio-mmio: " Jason Wang
2015-03-18 9:35 ` [Qemu-devel] [PATCH V4 13/19] virtio-pci: switch to use " Jason Wang
2015-03-18 9:35 ` [Qemu-devel] [PATCH V4 14/19] virtio: introduce vector to virtqueues mapping Jason Wang
2015-03-20 11:39 ` Cornelia Huck
2015-03-31 2:37 ` Jason Wang
2015-03-18 9:35 ` [Qemu-devel] [PATCH V4 15/19] virtio: introduce virtio_queue_get_index() Jason Wang
2015-03-18 9:35 ` [Qemu-devel] [PATCH V4 16/19] virtio-pci: speedup MSI-X masking and unmasking Jason Wang
2015-03-18 9:35 ` [Qemu-devel] [PATCH V4 17/19] virtio-pci: increase the maximum number of virtqueues to 513 Jason Wang
2015-03-18 9:35 ` [Qemu-devel] [PATCH V4 18/19] pci: remove hard-coded bar size in msix_init_exclusive_bar() Jason Wang
2015-03-18 12:52 ` Michael S. Tsirkin
2015-03-19 5:19 ` Jason Wang
2015-03-19 10:09 ` Michael S. Tsirkin [this message]
2015-03-20 5:43 ` Jason Wang
2015-03-18 9:35 ` [Qemu-devel] [PATCH V4 19/19] virtio-pci: introduce auto_msix_bar_size property Jason Wang
2015-03-18 12:57 ` Michael S. Tsirkin
2015-03-19 5:23 ` Jason Wang
2015-03-19 10:01 ` Michael S. Tsirkin
2015-03-20 5:35 ` Jason Wang
2015-03-19 5:23 ` Jason Wang
2015-03-19 10:02 ` Michael S. Tsirkin
2015-03-20 5:38 ` Jason Wang
2015-03-18 12:58 ` [Qemu-devel] [PATCH V4 00/19] Support more virtio queues Michael S. Tsirkin
2015-03-19 5:24 ` Jason Wang
2015-03-19 7:32 ` Michael S. Tsirkin
2015-03-19 7:42 ` Jason Wang
2015-03-19 9:23 ` Michael S. Tsirkin
2015-03-20 5:11 ` Jason Wang
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