Re: [Qemu-devel] [PATCH v4 00/20] Generate ACPI v5.1 tables and expose it to guest over fw_cfg on ARM

["Michael S. Tsirkin" <mst@redhat.com>]

On Tue, Apr 07, 2015 at 10:19:22AM +0100, Peter Maydell wrote:
> On 7 April 2015 at 03:43, Shannon Zhao <zhaoshenglong@huawei.com> wrote:
> > The dts node is:
> >                 ranges = <0x1000000 0x0 0x0 0x0 0x3eff0000 0x0 0x10000
> >                           0x2000000 0x0 0x10000000 0x0 0x10000000 0x0 0x2eff0000>;
> >                 reg = <0x0 0x3f000000 0x0 0x1000000>;
> >                 bus-range = <0x0 0xf>;
> >
> > The ACPI table entry:
> >             Method (_CBA, 0, NotSerialized)  // _CBA: Configuration Base Address
> >             {
> >                 Return (0x3F000000)
> >             }
> >             Method (_CRS, 0, NotSerialized)  // _CRS: Current Resource Settings
> >             {
> >                 Name (RBUF, ResourceTemplate ()
> >                 {
> >                     WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
> >                         0x0000,             // Granularity
> >                         0x0000,             // Range Minimum
> >                         0x000F,             // Range Maximum
> >                         0x0000,             // Translation Offset
> >                         0x0010,             // Length
> >                         ,, )
> >                     DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
> 
> Is this claiming that the non-cacheable PCI MMIO region is cacheable?
> If so that isn't right...

I suspect that's fine.
Some parts of MMIO might be cacheable. This really depends on the
device.

> >                         0x00000000,         // Granularity
> >                         0x10000000,         // Range Minimum
> >                         0x3EFF0000,         // Range Maximum
> >                         0x00000000,         // Translation Offset
> >                         0x2EFF0000,         // Length
> >                         ,, , AddressRangeMemory, TypeStatic)
> >                     DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
> >                         0x00000000,         // Granularity
> >                         0x3EFF0000,         // Range Minimum
> >                         0x3F000000,         // Range Maximum
> >                         0x00000000,         // Translation Offset
> 
> I rather suspect this is wrong, since (my guess without looking
> at the spec) it looks like it defines a 1:1 mapping between
> the addresses used to interact with the PCIe IO window and
> the IO addresses, which is obviously not what you want.
> My guess is you need to set the translation offset at least,
> but check the spec.
> 
> -- PMM