From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58318) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yi38B-0000bF-3z for qemu-devel@nongnu.org; Tue, 14 Apr 2015 11:52:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yi385-0006nR-FC for qemu-devel@nongnu.org; Tue, 14 Apr 2015 11:52:07 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53569) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yi385-0006nF-9o for qemu-devel@nongnu.org; Tue, 14 Apr 2015 11:52:01 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (Postfix) with ESMTPS id CBDE08F03F for ; Tue, 14 Apr 2015 15:52:00 +0000 (UTC) Date: Tue, 14 Apr 2015 17:51:57 +0200 From: "Michael S. Tsirkin" Message-ID: <20150414175141-mutt-send-email-mst@redhat.com> References: <1429017160-3583-1-git-send-email-kraxel@redhat.com> <20150414172749-mutt-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20150414172749-mutt-send-email-mst@redhat.com> Subject: Re: [Qemu-devel] [PATCH 1/2] q35: implement SMRAM.D_LCK List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann Cc: pbonzini@redhat.com, qemu-devel@nongnu.org On Tue, Apr 14, 2015 at 05:41:14PM +0200, Michael S. Tsirkin wrote: > On Tue, Apr 14, 2015 at 03:12:39PM +0200, Gerd Hoffmann wrote: > > Signed-off-by: Gerd Hoffmann > > --- > > hw/pci-host/q35.c | 17 ++++++++++++++++- > > 1 file changed, 16 insertions(+), 1 deletion(-) > > > > diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c > > index 79bab15..9227489 100644 > > --- a/hw/pci-host/q35.c > > +++ b/hw/pci-host/q35.c > > @@ -268,6 +268,20 @@ static void mch_update_smram(MCHPCIState *mch) > > PCIDevice *pd = PCI_DEVICE(mch); > > bool h_smrame = (pd->config[MCH_HOST_BRIDGE_ESMRAMC] & MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME); > > > > + /* implement SMRAM.D_LCK */ > > + if (pd->config[MCH_HOST_BRIDGE_SMRAM] & MCH_HOST_BRIDGE_SMRAM_D_LCK) { > > + pd->config[MCH_HOST_BRIDGE_SMRAM] &= ~MCH_HOST_BRIDGE_SMRAM_D_OPEN; > > + > > + pd->wmask[MCH_HOST_BRIDGE_SMRAM] &= ~MCH_HOST_BRIDGE_SMRAM_D_OPEN; > > + pd->wmask[MCH_HOST_BRIDGE_SMRAM] &= ~MCH_HOST_BRIDGE_SMRAM_D_LCK; > > + pd->wmask[MCH_HOST_BRIDGE_SMRAM] &= ~MCH_HOST_BRIDGE_SMRAM_G_SMRAME; > > + pd->wmask[MCH_HOST_BRIDGE_SMRAM] &= ~MCH_HOST_BRIDGE_SMRAM_C_BASE_SEG_MASK; > > + > > + pd->wmask[MCH_HOST_BRIDGE_ESMRAMC] &= ~MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME; > > + pd->wmask[MCH_HOST_BRIDGE_ESMRAMC] &= ~MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_MASK; > > + pd->wmask[MCH_HOST_BRIDGE_ESMRAMC] &= ~MCH_HOST_BRIDGE_ESMRAMC_T_EN; > > > I'd prefer a single statement: > pd->wmask[MCH_HOST_BRIDGE_SMRAM] &= > ~(MCH_HOST_BRIDGE_SMRAM_D_OPEN | MCH_HOST_BRIDGE_SMRAM_D_LCK | ... ) > > > + } > > + > > memory_region_transaction_begin(); > > > > if (pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_D_OPEN) { > > @@ -297,7 +311,6 @@ static void mch_write_config(PCIDevice *d, > > { > > MCHPCIState *mch = MCH_PCI_DEVICE(d); > > > > - /* XXX: implement SMRAM.D_LOCK */ > > pci_default_write_config(d, address, val, len); > > > > if (ranges_overlap(address, len, MCH_HOST_BRIDGE_PAM0, > > @@ -351,6 +364,8 @@ static void mch_reset(DeviceState *qdev) > > MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT); > > > > d->config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT; > > + d->wmask[MCH_HOST_BRIDGE_SMRAM] = 0xff; > > Is this right? I see a bunch of reserved bits etc there. > > > > + d->wmask[MCH_HOST_BRIDGE_ESMRAMC] = 0xff; And this mask seems not to match the spec, either. > Doesn't this mean we need to reset this register now? > > > > > mch_update(mch); > > } > > Don't you also need to clear D_LCK? > > > -- > > 1.8.3.1