From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47043) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YkASD-00081j-I8 for qemu-devel@nongnu.org; Mon, 20 Apr 2015 08:05:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YkAS9-00022S-Ej for qemu-devel@nongnu.org; Mon, 20 Apr 2015 08:05:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:55086) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YkAS9-00022O-92 for qemu-devel@nongnu.org; Mon, 20 Apr 2015 08:05:29 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (Postfix) with ESMTPS id 927DB8EFE5 for ; Mon, 20 Apr 2015 12:05:28 +0000 (UTC) Date: Mon, 20 Apr 2015 14:05:25 +0200 From: "Michael S. Tsirkin" Message-ID: <20150420140431-mutt-send-email-mst@redhat.com> References: <1429521560-2743-1-git-send-email-kraxel@redhat.com> <1429521560-2743-2-git-send-email-kraxel@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1429521560-2743-2-git-send-email-kraxel@redhat.com> Subject: Re: [Qemu-devel] [PATCH 2/6] add SMRAM+ESMRAMC wmask List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann Cc: pbonzini@redhat.com, lersek@redhat.com, qemu-devel@nongnu.org On Mon, Apr 20, 2015 at 11:19:16AM +0200, Gerd Hoffmann wrote: > Signed-off-by: Gerd Hoffmann I would probably squash 2 and 3, to reduce the chance of bisect related issues. Otherwise Reviewed-by: Michael S. Tsirkin > --- > hw/pci-host/q35.c | 2 ++ > include/hw/pci-host/q35.h | 9 +++++++++ > 2 files changed, 11 insertions(+) > > diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c > index 9735db2..7093cc3 100644 > --- a/hw/pci-host/q35.c > +++ b/hw/pci-host/q35.c > @@ -352,6 +352,8 @@ static void mch_reset(DeviceState *qdev) > > d->config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT; > d->config[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_DEFAULT; > + d->wmask[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_WMASK; > + d->wmask[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_WMASK; > > mch_update(mch); > } > diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h > index 9704ccd..82452c5 100644 > --- a/include/hw/pci-host/q35.h > +++ b/include/hw/pci-host/q35.h > @@ -141,6 +141,11 @@ typedef struct Q35PCIHost { > #define MCH_HOST_BRIDGE_UPPER_SYSTEM_BIOS_END 0x100000 > #define MCH_HOST_BRIDGE_SMRAM_DEFAULT \ > MCH_HOST_BRIDGE_SMRAM_C_BASE_SEG > +#define MCH_HOST_BRIDGE_SMRAM_WMASK \ > + (MCH_HOST_BRIDGE_SMRAM_D_OPEN | \ > + MCH_HOST_BRIDGE_SMRAM_D_CLS | \ > + MCH_HOST_BRIDGE_SMRAM_D_LCK | \ > + MCH_HOST_BRIDGE_SMRAM_G_SMRAME) > > #define MCH_HOST_BRIDGE_ESMRAMC 0x9e > #define MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME ((uint8_t)(1 << 7)) > @@ -157,6 +162,10 @@ typedef struct Q35PCIHost { > (MCH_HOST_BRIDGE_ESMRAMC_SM_CACHE | \ > MCH_HOST_BRIDGE_ESMRAMC_SM_L1 | \ > MCH_HOST_BRIDGE_ESMRAMC_SM_L2) > +#define MCH_HOST_BRIDGE_ESMRAMC_WMASK \ > + (MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME | \ > + MCH_HOST_BRIDGE_ESMRAMC_TSEG_SZ_MASK | \ > + MCH_HOST_BRIDGE_ESMRAMC_T_EN) > > /* D1:F0 PCIE* port*/ > #define MCH_PCIE_DEV 1 > -- > 1.8.3.1