From: Christoffer Dall <christoffer.dall@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
Eric Auger <eric.auger@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 2/3] arm_gicv2m: Add GICv2m widget to support MSIs
Date: Mon, 27 Apr 2015 06:50:08 -0700 [thread overview]
Message-ID: <20150427135008.GB29088@lvm> (raw)
In-Reply-To: <CAFEAcA-=kfSa7ZWEfFNj94FAHjTbSJnu05aiFhhCWQqAO-4PfA@mail.gmail.com>
On Mon, Apr 27, 2015 at 02:43:17PM +0100, Peter Maydell wrote:
> On 27 April 2015 at 14:41, Christoffer Dall <christoffer.dall@linaro.org> wrote:
> > Regarding adding support for the security extensions later, I assume the
> > QEMU-specifics will be to add a flag to the device instantiation from
> > the containing board activating security support, which would grow the
> > IO region size of this device from 4K to 8K for an adjacent secure
> > register frame and adjust the offsets. I cannot think of a reason why
> > that wouldn't work backwards-compatibly?
>
> I think you'd probably want to add a second MMIO region rather
> than making the first one double-size. I don't think there's anything
> in the spec that mandates them being adjacent. You also need to allocate
> more interrupt lines.
Right; the spec actually says they are NOT required to be adjacent.
>
> I think this should all be backwards-compatible, yes.
>
ok - thanks,
-Christoffer
next prev parent reply other threads:[~2015-04-27 13:50 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-08 21:20 [Qemu-devel] [PATCH 0/3] Add support for for GICv2m and MSIs to arm-virt Christoffer Dall
2015-04-08 21:20 ` [Qemu-devel] [PATCH 1/3] target-arm: Add GIC phandle to VirtBoardInfo Christoffer Dall
2015-04-21 13:56 ` Peter Maydell
2015-04-08 21:20 ` [Qemu-devel] [PATCH 2/3] arm_gicv2m: Add GICv2m widget to support MSIs Christoffer Dall
2015-04-10 9:16 ` Eric Auger
2015-04-10 9:58 ` Christoffer Dall
2015-04-10 10:34 ` Eric Auger
2015-04-10 10:39 ` Christoffer Dall
2015-04-21 14:11 ` Peter Maydell
2015-04-21 14:40 ` Peter Maydell
2015-04-27 13:41 ` Christoffer Dall
2015-04-27 13:43 ` Peter Maydell
2015-04-27 13:50 ` Christoffer Dall [this message]
2015-04-08 21:21 ` [Qemu-devel] [PATCH 3/3] target-arm: Add the GICv2m to the virt board Christoffer Dall
2015-04-21 14:47 ` Peter Maydell
2015-04-27 13:51 ` Christoffer Dall
2015-04-27 16:06 ` Christoffer Dall
2015-04-27 16:18 ` Peter Maydell
2015-04-08 21:31 ` [Qemu-devel] [PATCH 0/3] Add support for for GICv2m and MSIs to arm-virt Peter Maydell
2015-04-09 8:11 ` Christoffer Dall
2015-04-08 22:01 ` Nikolay Nikolaev
2015-04-09 8:03 ` Christoffer Dall
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150427135008.GB29088@lvm \
--to=christoffer.dall@linaro.org \
--cc=eric.auger@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).