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Date: Mon, 27 Apr 2015 06:50:08 -0700
From: Christoffer Dall <christoffer.dall@linaro.org>
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Subject: Re: [Qemu-devel] [PATCH 2/3] arm_gicv2m: Add GICv2m widget to
 support MSIs
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>, Eric Auger <eric.auger@linaro.org>

On Mon, Apr 27, 2015 at 02:43:17PM +0100, Peter Maydell wrote:
> On 27 April 2015 at 14:41, Christoffer Dall <christoffer.dall@linaro.org> wrote:
> > Regarding adding support for the security extensions later, I assume the
> > QEMU-specifics will be to add a flag to the device instantiation from
> > the containing board activating security support, which would grow the
> > IO region size of this device from 4K to 8K for an adjacent secure
> > register frame and adjust the offsets.  I cannot think of a reason why
> > that wouldn't work backwards-compatibly?
> 
> I think you'd probably want to add a second MMIO region rather
> than making the first one double-size. I don't think there's anything
> in the spec that mandates them being adjacent. You also need to allocate
> more interrupt lines.

Right; the spec actually says they are NOT required to be adjacent.

> 
> I think this should all be backwards-compatible, yes.
> 

ok - thanks,
-Christoffer