From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38320) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YpQVl-0001XB-TO for qemu-devel@nongnu.org; Mon, 04 May 2015 20:14:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YpQVi-0006k5-Mx for qemu-devel@nongnu.org; Mon, 04 May 2015 20:14:57 -0400 Received: from mail-ig0-x234.google.com ([2607:f8b0:4001:c05::234]:34854) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YpQVi-0006k0-Ec for qemu-devel@nongnu.org; Mon, 04 May 2015 20:14:54 -0400 Received: by igbyr2 with SMTP id yr2so99491046igb.0 for ; Mon, 04 May 2015 17:14:53 -0700 (PDT) Date: Tue, 5 May 2015 10:11:26 +1000 From: "Edgar E. Iglesias" Message-ID: <20150505001126.GD10142@toto> References: <1430502643-25909-1-git-send-email-peter.maydell@linaro.org> <1430502643-25909-2-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1430502643-25909-2-git-send-email-peter.maydell@linaro.org> Subject: Re: [Qemu-devel] [PATCH v4 01/17] hw/intc/arm_gic: Create outbound FIQ lines List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Greg Bellows , qemu-devel@nongnu.org, patches@linaro.org On Fri, May 01, 2015 at 06:50:27PM +0100, Peter Maydell wrote: > From: Fabian Aggeler > > Create the outbound FIQ lines from the GIC to the CPUs; these are > used if the GIC has security extensions or grouping support. > > Signed-off-by: Fabian Aggeler > Signed-off-by: Greg Bellows > Message-id: 1429113742-8371-2-git-send-email-greg.bellows@linaro.org > [PMM: added FIQ lines to kvm-arm-gic so its interface is the same; > tweaked commit message] > Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias > --- > hw/intc/arm_gic.c | 3 +++ > hw/intc/arm_gic_kvm.c | 5 ++++- > include/hw/intc/arm_gic_common.h | 1 + > 3 files changed, 8 insertions(+), 1 deletion(-) > > diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c > index a04c822..e9fb8b9 100644 > --- a/hw/intc/arm_gic.c > +++ b/hw/intc/arm_gic.c > @@ -790,6 +790,9 @@ void gic_init_irqs_and_distributor(GICState *s) > for (i = 0; i < NUM_CPU(s); i++) { > sysbus_init_irq(sbd, &s->parent_irq[i]); > } > + for (i = 0; i < NUM_CPU(s); i++) { > + sysbus_init_irq(sbd, &s->parent_fiq[i]); > + } > memory_region_init_io(&s->iomem, OBJECT(s), &gic_dist_ops, s, > "gic_dist", 0x1000); > } > diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c > index e1952ad..5aedae1 100644 > --- a/hw/intc/arm_gic_kvm.c > +++ b/hw/intc/arm_gic_kvm.c > @@ -554,12 +554,15 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp) > */ > i += (GIC_INTERNAL * s->num_cpu); > qdev_init_gpio_in(dev, kvm_arm_gic_set_irq, i); > - /* We never use our outbound IRQ lines but provide them so that > + /* We never use our outbound IRQ/FIQ lines but provide them so that > * we maintain the same interface as the non-KVM GIC. > */ > for (i = 0; i < s->num_cpu; i++) { > sysbus_init_irq(sbd, &s->parent_irq[i]); > } > + for (i = 0; i < s->num_cpu; i++) { > + sysbus_init_irq(sbd, &s->parent_fiq[i]); > + } > > /* Try to create the device via the device control API */ > s->dev_fd = -1; > diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h > index f6887ed..01c6f24 100644 > --- a/include/hw/intc/arm_gic_common.h > +++ b/include/hw/intc/arm_gic_common.h > @@ -50,6 +50,7 @@ typedef struct GICState { > /*< public >*/ > > qemu_irq parent_irq[GIC_NCPU]; > + qemu_irq parent_fiq[GIC_NCPU]; > bool enabled; > bool cpu_enabled[GIC_NCPU]; > > -- > 1.9.1 >