From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35541) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YpRpS-00044v-KH for qemu-devel@nongnu.org; Mon, 04 May 2015 21:39:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YpRpP-0003ah-Dr for qemu-devel@nongnu.org; Mon, 04 May 2015 21:39:22 -0400 Received: from mail-pa0-x232.google.com ([2607:f8b0:400e:c03::232]:34205) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YpRpP-0003aT-6T for qemu-devel@nongnu.org; Mon, 04 May 2015 21:39:19 -0400 Received: by pacyx8 with SMTP id yx8so176561001pac.1 for ; Mon, 04 May 2015 18:39:18 -0700 (PDT) Date: Tue, 5 May 2015 11:35:53 +1000 From: "Edgar E. Iglesias" Message-ID: <20150505013553.GL10142@toto> References: <1430502643-25909-1-git-send-email-peter.maydell@linaro.org> <1430502643-25909-10-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1430502643-25909-10-git-send-email-peter.maydell@linaro.org> Subject: Re: [Qemu-devel] [PATCH v4 09/17] hw/intc/arm_gic: Implement Non-secure view of RPR List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Greg Bellows , qemu-devel@nongnu.org, patches@linaro.org On Fri, May 01, 2015 at 06:50:35PM +0100, Peter Maydell wrote: > From: Fabian Aggeler > > For GICs with Security Extensions Non-secure reads have a restricted > view on the current running priority. > > Signed-off-by: Fabian Aggeler > Signed-off-by: Greg Bellows > Message-id: 1429113742-8371-11-git-send-email-greg.bellows@linaro.org > [PMM: make function static, minor comment tweak] > Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias > --- > hw/intc/arm_gic.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c > index 4aaaac2..e3bbe9e 100644 > --- a/hw/intc/arm_gic.c > +++ b/hw/intc/arm_gic.c > @@ -286,6 +286,23 @@ static void gic_set_cpu_control(GICState *s, int cpu, uint32_t value, > (s->cpu_ctlr[cpu] & GICC_CTLR_EN_GRP1) ? "En" : "Dis"); > } > > +static uint8_t gic_get_running_priority(GICState *s, int cpu, MemTxAttrs attrs) > +{ > + if (s->security_extn && !attrs.secure) { > + if (s->running_priority[cpu] & 0x80) { > + /* Running priority in upper half of range: return the Non-secure > + * view of the priority. > + */ > + return s->running_priority[cpu] << 1; > + } else { > + /* Running priority in lower half of range: RAZ */ > + return 0; > + } > + } else { > + return s->running_priority[cpu]; > + } > +} > + > void gic_complete_irq(GICState *s, int cpu, int irq) > { > int update = 0; > @@ -817,7 +834,7 @@ static MemTxResult gic_cpu_read(GICState *s, int cpu, int offset, > *data = gic_acknowledge_irq(s, cpu); > break; > case 0x14: /* Running Priority */ > - *data = s->running_priority[cpu]; > + *data = gic_get_running_priority(s, cpu, attrs); > break; > case 0x18: /* Highest Pending Interrupt */ > *data = s->current_pending[cpu]; > -- > 1.9.1 >