From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51705) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YpssW-00081i-3a for qemu-devel@nongnu.org; Wed, 06 May 2015 02:32:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YpssR-0007xS-N6 for qemu-devel@nongnu.org; Wed, 06 May 2015 02:32:20 -0400 Date: Wed, 6 May 2015 08:32:03 +0200 From: Thomas Huth Message-ID: <20150506083203.44a34952@thh440s> In-Reply-To: <20150506042809.GI18380@in.ibm.com> References: <1429858066-12088-1-git-send-email-bharata@linux.vnet.ibm.com> <1429858066-12088-7-git-send-email-bharata@linux.vnet.ibm.com> <20150504181059.5321ba37@thh440s> <20150506042809.GI18380@in.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC PATCH v3 06/24] spapr: Consolidate cpu init code into a routine List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bharata B Rao Cc: mdroth@linux.vnet.ibm.com, aik@ozlabs.ru, agraf@suse.de, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, tyreld@linux.vnet.ibm.com, imammedo@redhat.com, nfont@linux.vnet.ibm.com, afaerber@suse.de, david@gibson.dropbear.id.au On Wed, 6 May 2015 09:58:09 +0530 Bharata B Rao wrote: > On Mon, May 04, 2015 at 06:10:59PM +0200, Thomas Huth wrote: > > On Fri, 24 Apr 2015 12:17:28 +0530 > > Bharata B Rao wrote: > > > > > Factor out bits of sPAPR specific CPU initialization code into > > > a separate routine so that it can be called from CPU hotplug > > > path too. > > > > > > Signed-off-by: Bharata B Rao > > > Reviewed-by: David Gibson > > > --- > > > hw/ppc/spapr.c | 54 +++++++++++++++++++++++++++++------------------------- > > > 1 file changed, 29 insertions(+), 25 deletions(-) > > > > > > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > > > index a56f9a1..5c8f2ff 100644 > > > --- a/hw/ppc/spapr.c > > > +++ b/hw/ppc/spapr.c > > > @@ -1440,6 +1440,34 @@ static void spapr_drc_reset(void *opaque) > > > } > > > } > > > > > > +static void spapr_cpu_init(PowerPCCPU *cpu) > > > +{ > > > + CPUPPCState *env = &cpu->env; > > > + > > > + /* Set time-base frequency to 512 MHz */ > > > + cpu_ppc_tb_init(env, TIMEBASE_FREQ); > > > + > > > + /* PAPR always has exception vectors in RAM not ROM. To ensure this, > > > + * MSR[IP] should never be set. > > > + */ > > > + env->msr_mask &= ~(1 << 6); > > > > While you're at it ... could we maybe get a proper #define for that MSR > > bit? (just like the other ones in target-ppc/cpu.h) > > Sure will use MSR_EP here next time. According to the comment in cpu.h, the EP bit was for the 601 CPU only, so I think it would be better to introduce a new #define MSR_IP 6 (or so) here instead. Thomas