From: "Emilio G. Cota" <cota@braap.org>
To: Alvise Rigo <a.rigo@virtualopensystems.com>
Cc: mttcg@listserver.greensocs.com, jani.kokkonen@huawei.com,
tech@virtualopensystems.com, claudio.fontana@huawei.com,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [RFC 0/5] Slow-path for atomic instruction translation
Date: Fri, 8 May 2015 14:29:47 -0400 [thread overview]
Message-ID: <20150508182947.GA9290@flamenco> (raw)
In-Reply-To: <1430926687-25875-1-git-send-email-a.rigo@virtualopensystems.com>
On Wed, May 06, 2015 at 17:38:02 +0200, Alvise Rigo wrote:
> This patch series provides an infrastructure for atomic
> instruction implementation in QEMU, paving the way for TCG multi-threading.
> The adopted design does not rely on host atomic
> instructions and is intended to propose a 'legacy' solution for
> translating guest atomic instructions.
Patch 2 doesn't apply to current master. I fixed the conflict manually
and get a segfault before it boots:
(gdb) bt
#0 0x0000555555657b04 in test_bit (addr=<optimized out>, nr=<optimized out>)
at /local/home/cota/src/qemu/include/qemu/bitops.h:119
#1 cpu_physical_memory_excl_is_dirty (addr=18446744073709551615)
at /local/home/cota/src/qemu/include/exec/ram_addr.h:214
#2 tlb_set_page_with_attrs (cpu=<optimized out>, vaddr=<optimized out>,
paddr=503316480, attrs=..., prot=<optimized out>, mmu_idx=3, size=1024)
at /local/home/cota/src/qemu/cputlb.c:328
#3 0x0000555555714c68 in arm_cpu_handle_mmu_fault (cs=0x555556334500,
address=<optimized out>, access_type=0, mmu_idx=3)
at /local/home/cota/src/qemu/target-arm/helper.c:5813
#4 0x00005555557077b0 in tlb_fill (cs=0x555556334500, addr=<optimized out>,
is_write=<optimized out>, mmu_idx=<optimized out>, retaddr=140737065132893)
at /local/home/cota/src/qemu/target-arm/op_helper.c:69
#5 0x000055555565939f in helper_le_ldul_mmu (env=0x55555633c750,
addr=503316484, mmu_idx=3, retaddr=<optimized out>)
at /local/home/cota/src/qemu/softmmu_template.h:192
#6 0x00007fffe6c623db in code_gen_buffer ()
#7 0x00005555556156ea in cpu_tb_exec (
tb_ptr=0x7fffe6c62320 "A\213n\374\205\355\017\205\207", cpu=0x555556334500)
at /local/home/cota/src/qemu/cpu-exec.c:199
#8 cpu_arm_exec (env=0x55555633c750)
at /local/home/cota/src/qemu/cpu-exec.c:519
#9 0x000055555563c340 in tcg_cpu_exec (env=0x55555633c750)
at /local/home/cota/src/qemu/cpus.c:1354
#10 tcg_exec_all () at /local/home/cota/src/qemu/cpus.c:1387
#11 qemu_tcg_cpu_thread_fn (arg=<optimized out>)
at /local/home/cota/src/qemu/cpus.c:1032
#12 0x00007ffff40dfe9a in start_thread (arg=0x7fffe4a45700)
at pthread_create.c:308
#13 0x00007ffff3e0d38d in clone ()
at ../sysdeps/unix/sysv/linux/x86_64/clone.S:112
#14 0x0000000000000000 in ?? ()
It could be that my manual fix of the conflicts was wrong. What commit
are your patches based on?
Thanks,
Emilio
next prev parent reply other threads:[~2015-05-08 18:29 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-06 15:38 [Qemu-devel] [RFC 0/5] Slow-path for atomic instruction translation Alvise Rigo
2015-05-06 15:38 ` [Qemu-devel] [RFC 1/5] exec: Add new exclusive bitmap to ram_list Alvise Rigo
2015-05-07 17:12 ` Richard Henderson
2015-05-11 7:48 ` alvise rigo
2015-05-06 15:38 ` [Qemu-devel] [RFC 2/5] Add new TLB_EXCL flag Alvise Rigo
2015-05-07 17:25 ` Richard Henderson
2015-05-11 7:47 ` alvise rigo
2015-05-06 15:38 ` [Qemu-devel] [RFC 3/5] softmmu: Add helpers for a new slow-path Alvise Rigo
2015-05-07 17:56 ` Richard Henderson
2015-05-11 8:07 ` alvise rigo
2015-05-06 15:38 ` [Qemu-devel] [RFC 4/5] tcg-op: create new TCG qemu_ldlink and qemu_stcond instructions Alvise Rigo
2015-05-07 17:58 ` Richard Henderson
2015-05-11 8:12 ` alvise rigo
2015-05-06 15:38 ` [Qemu-devel] [RFC 5/5] target-arm: translate: implement qemu_ldlink and qemu_stcond ops Alvise Rigo
2015-05-06 15:51 ` [Qemu-devel] [RFC 0/5] Slow-path for atomic instruction translation Paolo Bonzini
2015-05-06 16:00 ` Mark Burton
2015-05-06 16:21 ` alvise rigo
2015-05-06 15:55 ` Mark Burton
2015-05-06 16:19 ` alvise rigo
2015-05-06 16:20 ` Mark Burton
2015-05-08 15:22 ` Alex Bennée
2015-05-11 9:08 ` alvise rigo
2015-05-08 18:29 ` Emilio G. Cota [this message]
2015-05-11 9:10 ` alvise rigo
2015-05-26 21:51 ` Emilio G. Cota
2015-05-27 7:20 ` alvise rigo
2015-05-27 8:51 ` Alex Bennée
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