From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36638) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YreTr-000122-3m for qemu-devel@nongnu.org; Sun, 10 May 2015 23:34:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YreTn-0003UU-T1 for qemu-devel@nongnu.org; Sun, 10 May 2015 23:34:11 -0400 Received: from e28smtp01.in.ibm.com ([122.248.162.1]:47495) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YreTn-0003UM-9u for qemu-devel@nongnu.org; Sun, 10 May 2015 23:34:07 -0400 Received: from /spool/local by e28smtp01.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 11 May 2015 09:04:02 +0530 Received: from d28relay02.in.ibm.com (d28relay02.in.ibm.com [9.184.220.59]) by d28dlp02.in.ibm.com (Postfix) with ESMTP id EE6743940048 for ; Mon, 11 May 2015 09:03:59 +0530 (IST) Received: from d28av04.in.ibm.com (d28av04.in.ibm.com [9.184.220.66]) by d28relay02.in.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t4B3XxXd6488180 for ; Mon, 11 May 2015 09:03:59 +0530 Received: from d28av04.in.ibm.com (localhost [127.0.0.1]) by d28av04.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t4B3XwkK016172 for ; Mon, 11 May 2015 09:03:59 +0530 Date: Mon, 11 May 2015 09:03:57 +0530 From: Bharata B Rao Message-ID: <20150511033357.GA7715@in.ibm.com> References: <1431078696-29519-1-git-send-email-bharata@linux.vnet.ibm.com> <1431078696-29519-3-git-send-email-bharata@linux.vnet.ibm.com> <20150508145500.GJ17796@thinpad.lan.raisama.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20150508145500.GJ17796@thinpad.lan.raisama.net> Subject: Re: [Qemu-devel] [RFC v1 PATCH 2/3] cpus: Convert cpu_index into a bitmap Reply-To: bharata@linux.vnet.ibm.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: zhugh.fnst@cn.fujitsu.com, agraf@suse.de, qemu-devel@nongnu.org, imammedo@redhat.com, afaerber@suse.de, david@gibson.dropbear.id.au On Fri, May 08, 2015 at 11:55:00AM -0300, Eduardo Habkost wrote: > On Fri, May 08, 2015 at 03:21:35PM +0530, Bharata B Rao wrote: > > Currently CPUState.cpu_index is monotonically increasing and a newly > > created CPU always gets the next higher index. The next available > > index is calculated by counting the existing number of CPUs. This is > > fine as long as we only add CPUs, but there are architectures which > > are starting to support CPU removal too. For an architecture like PowerPC > > which derives its CPU identifier (device tree ID) from cpu_index, the > > existing logic of generating cpu_index values causes problems. > > > > With the currently proposed method of handling vCPU removal by parking > > the vCPU fd in QEMU > > (Ref: http://lists.gnu.org/archive/html/qemu-devel/2015-02/msg02604.html), > > generating cpu_index this way will not work for PowerPC. > > > > This patch changes the way cpu_index is handed out by maintaining > > a bit map of the CPUs that tracks both addition and removal of CPUs. > > > > The CPU bitmap allocation logic is part of cpu_exec_init() which is > > called by instance_init routines of various CPU targets. This patch > > also adds corresponding instance_finalize routine if needed for these > > CPU targets so that CPU can be marked free when it is removed. > > > > Signed-off-by: Bharata B Rao > > --- > > exec.c | 37 ++++++++++++++++++++++++++++++++++--- > > include/qom/cpu.h | 8 ++++++++ > > target-alpha/cpu.c | 6 ++++++ > > target-arm/cpu.c | 1 + > > target-cris/cpu.c | 6 ++++++ > > target-i386/cpu.c | 6 ++++++ > > target-lm32/cpu.c | 6 ++++++ > > target-m68k/cpu.c | 6 ++++++ > > target-microblaze/cpu.c | 6 ++++++ > > target-mips/cpu.c | 6 ++++++ > > target-moxie/cpu.c | 6 ++++++ > > target-openrisc/cpu.c | 6 ++++++ > > target-ppc/translate_init.c | 6 ++++++ > > target-s390x/cpu.c | 1 + > > target-sh4/cpu.c | 6 ++++++ > > target-sparc/cpu.c | 1 + > > target-tricore/cpu.c | 5 +++++ > > target-unicore32/cpu.c | 6 ++++++ > > target-xtensa/cpu.c | 6 ++++++ > > 19 files changed, 128 insertions(+), 3 deletions(-) > > Why not simply call cpu_exec_exit() on generic CPU::instance_finalize, > to avoid forcing every architecture to call it manually? Calling > cpu_exec_exit() twice would be harmless, anyway. Yes cpu_exec_exit() can be called from generic CPU::instance_finalize and it does appear harmless calling it twice but, Can there be a situation where cpu_index freed from the first cpu_exec_exit() call from ->unrealize() be allocated (to a different caller) again before the 2nd call for the same CPU from CPU::instance_finalize ? If yes, cpu_exec_exit() needs to be more intelligent than what it is currently is. > > (It would just need an additional check to make sure the bit will be > cleared only if cpu_exec_init() was really called and cpu_index was > properly set.) If the situation I describe above can indeed happen, then cpu_exec_exit() needs to maintain state to safely fail the double free for the same CPU from the same caller. I think touching all archs and adding instance_finalize would be much more simpler, cleaner and correct. When archs want to move cpu_exec_init() and cpu_exec_exit() to realize/unlrealize, they can do so. Regards, Bharata.