From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58479) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yru19-0005Ck-Or for qemu-devel@nongnu.org; Mon, 11 May 2015 16:09:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yru16-0005ny-Gn for qemu-devel@nongnu.org; Mon, 11 May 2015 16:09:35 -0400 Received: from mga11.intel.com ([192.55.52.93]:24280) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yru16-0005nu-Bl for qemu-devel@nongnu.org; Mon, 11 May 2015 16:09:32 -0400 Date: Mon, 11 May 2015 13:08:05 -0700 From: "Sean O. Stalley" Message-ID: <20150511200805.GA2861@sean.stalley.intel.com> References: <1431370604-3965-1-git-send-email-sean.stalley@intel.com> <20150511212524-mutt-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20150511212524-mutt-send-email-mst@redhat.com> Subject: Re: [Qemu-devel] [PATCH 1/1] Add support for PCI Enhanced Allocation "BARs" List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: qemu-devel@nongnu.org On Mon, May 11, 2015 at 09:26:08PM +0200, Michael S. Tsirkin wrote: > On Mon, May 11, 2015 at 11:56:44AM -0700, Sean O. Stalley wrote: > > PCI Enhanced Allocation is a new method of allocating MMIO & IO > > resources for PCI devices & bridges. It can be used instead > > of the traditional PCI method of using BARs. > > > > EA entries are hardware-initialized to a fixed address. > > Unlike BARs, regions described by EA are cannot be moved. > > Because of this, only devices which are perminately connected to > > the PCI bus can use EA. A removeable PCI card must not use EA. > > > > This patchset enables any existing QEMU PCI model to use EA in leiu of > > BARs. It adds EA options to the PCI device paramaters. > > > > The Enhanced Allocation ECN is publicly available here: > > https://www.pcisig.com/specifications/conventional/ECN_Enhanced_Allocation_23_Oct_2014_Final.pdf > > > > Signed-off-by: Sean O. Stalley > > > I will review this, thanks. Will you also be sending a seabios patch to > support these registers? When you do, please Cc me. Thanks Michael, I wasn't planning on sending a seabios patch. I do have some EDKII/OVMF patches I hope to send out soon. I will Cc you on those. -Sean > > > > --- > > hw/pci/Makefile.objs | 2 +- > > hw/pci/pci.c | 96 ++++++++++++++++------ > > hw/pci/pci_ea.c | 203 ++++++++++++++++++++++++++++++++++++++++++++++ > > include/hw/pci/pci.h | 7 ++ > > include/hw/pci/pci_ea.h | 39 +++++++++ > > include/hw/pci/pci_regs.h | 4 + > > include/qemu/typedefs.h | 1 + > > 7 files changed, 328 insertions(+), 24 deletions(-) > > create mode 100644 hw/pci/pci_ea.c > > create mode 100644 include/hw/pci/pci_ea.h