From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60581) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yzjyb-0006Fn-Qv for qemu-devel@nongnu.org; Tue, 02 Jun 2015 07:03:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YzjyW-0004bs-48 for qemu-devel@nongnu.org; Tue, 02 Jun 2015 07:03:21 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:59795) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YzjyV-0004ba-VR for qemu-devel@nongnu.org; Tue, 02 Jun 2015 07:03:16 -0400 Date: Tue, 2 Jun 2015 13:03:15 +0200 From: Aurelien Jarno Message-ID: <20150602110315.GE26298@aurel32.net> References: <1432729200-5322-1-git-send-email-hpoussin@reactos.org> <1432729200-5322-6-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: <1432729200-5322-6-git-send-email-hpoussin@reactos.org> Sender: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH v2 05/17] dma/rc4030: document register at offset 0x210 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-15?Q?Herv=E9?= Poussineau Cc: Leon Alrae , qemu-devel@nongnu.org On 2015-05-27 14:19, Herv=E9 Poussineau wrote: > Signed-off-by: Herv=E9 Poussineau > --- > hw/dma/rc4030.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) >=20 > diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c > index 96f796b..bf82eed 100644 > --- a/hw/dma/rc4030.c > +++ b/hw/dma/rc4030.c > @@ -86,7 +86,7 @@ typedef struct rc4030State > uint32_t cache_bmask; /* 0x0058: I/O Cache Byte Mask */ > =20 > uint32_t nmi_interrupt; /* 0x0200: interrupt source */ > - uint32_t offset210; > + uint32_t memory_refresh_rate; /* 0x0210: memory refresh rate */ > uint32_t nvram_protect; /* 0x0220: NV ram protect register */ > uint32_t rem_speed[16]; > uint32_t imr_jazz; /* Local bus int enable mask */ > @@ -233,9 +233,9 @@ static uint64_t rc4030_read(void *opaque, hwaddr addr= , unsigned int size) > case 0x0208: > val =3D 0; > break; > - /* Offset 0x0210 */ > + /* Memory refresh rate */ > case 0x0210: > - val =3D s->offset210; > + val =3D s->memory_refresh_rate; > break; > /* NV ram protect register */ > case 0x0220: > @@ -461,9 +461,9 @@ static void rc4030_write(void *opaque, hwaddr addr, u= int64_t data, > s->dma_regs[entry][idx] =3D val; > } > break; > - /* Offset 0x0210 */ > + /* Memory refresh rate */ > case 0x0210: > - s->offset210 =3D val; > + s->memory_refresh_rate =3D val; > break; > /* Interval timer reload */ > case 0x0228: > @@ -621,7 +621,7 @@ static void rc4030_reset(void *opaque) > s->cache_ptag =3D s->cache_ltag =3D 0; > s->cache_bmask =3D 0; > =20 > - s->offset210 =3D 0x18186; > + s->memory_refresh_rate =3D 0x18186; > s->nvram_protect =3D 7; > for (i =3D 0; i < 15; i++) > s->rem_speed[i] =3D 7; > @@ -655,7 +655,7 @@ static int rc4030_load(QEMUFile *f, void *opaque, int= version_id) > s->cache_ptag =3D qemu_get_be32(f); > s->cache_ltag =3D qemu_get_be32(f); > s->cache_bmask =3D qemu_get_be32(f); > - s->offset210 =3D qemu_get_be32(f); > + s->memory_refresh_rate =3D qemu_get_be32(f); > s->nvram_protect =3D qemu_get_be32(f); > for (i =3D 0; i < 15; i++) > s->rem_speed[i] =3D qemu_get_be32(f); > @@ -687,7 +687,7 @@ static void rc4030_save(QEMUFile *f, void *opaque) > qemu_put_be32(f, s->cache_ptag); > qemu_put_be32(f, s->cache_ltag); > qemu_put_be32(f, s->cache_bmask); > - qemu_put_be32(f, s->offset210); > + qemu_put_be32(f, s->memory_refresh_rate); > qemu_put_be32(f, s->nvram_protect); > for (i =3D 0; i < 15; i++) > qemu_put_be32(f, s->rem_speed[i]); Reviewed-by: Aurelien Jarno --=20 Aurelien Jarno GPG: 4096R/1DDD8C9B aurelien@aurel32.net http://www.aurel32.net