From: Aurelien Jarno <aurelien@aurel32.net>
To: "Hervé Poussineau" <hpoussin@reactos.org>
Cc: Leon Alrae <leon.alrae@imgtec.com>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 06/17] dma/rc4030: use trace events instead of custom logging
Date: Tue, 2 Jun 2015 13:03:23 +0200 [thread overview]
Message-ID: <20150602110323.GF26298@aurel32.net> (raw)
In-Reply-To: <1432729200-5322-7-git-send-email-hpoussin@reactos.org>
On 2015-05-27 14:19, Hervé Poussineau wrote:
> Remove also unneeded debug logs.
>
> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
> ---
> hw/dma/rc4030.c | 81 ++++++++++++---------------------------------------------
> trace-events | 6 +++++
> 2 files changed, 22 insertions(+), 65 deletions(-)
>
> diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c
> index bf82eed..55844ed 100644
> --- a/hw/dma/rc4030.c
> +++ b/hw/dma/rc4030.c
> @@ -26,24 +26,7 @@
> #include "hw/mips/mips.h"
> #include "qemu/timer.h"
> #include "exec/address-spaces.h"
> -
> -/********************************************************/
> -/* debug rc4030 */
> -
> -//#define DEBUG_RC4030
> -//#define DEBUG_RC4030_DMA
> -
> -#ifdef DEBUG_RC4030
> -#define DPRINTF(fmt, ...) \
> -do { printf("rc4030: " fmt , ## __VA_ARGS__); } while (0)
> -static const char* irq_names[] = { "parallel", "floppy", "sound", "video",
> - "network", "scsi", "keyboard", "mouse", "serial0", "serial1" };
> -#else
> -#define DPRINTF(fmt, ...)
> -#endif
> -
> -#define RC4030_ERROR(fmt, ...) \
> -do { fprintf(stderr, "rc4030 ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
> +#include "trace.h"
>
> /********************************************************/
> /* rc4030 emulation */
> @@ -251,13 +234,14 @@ static uint64_t rc4030_read(void *opaque, hwaddr addr, unsigned int size)
> val = 7; /* FIXME: should be read from EISA controller */
> break;
> default:
> - RC4030_ERROR("invalid read [" TARGET_FMT_plx "]\n", addr);
> + qemu_log_mask(LOG_GUEST_ERROR,
> + "rc4030: invalid read at 0x%x", (int)addr);
> val = 0;
> break;
> }
>
> if ((addr & ~3) != 0x230) {
> - DPRINTF("read 0x%02x at " TARGET_FMT_plx "\n", val, addr);
> + trace_rc4030_read(addr, val);
> }
>
> return val;
> @@ -360,7 +344,7 @@ static void rc4030_write(void *opaque, hwaddr addr, uint64_t data,
> uint32_t val = data;
> addr &= 0x3fff;
>
> - DPRINTF("write 0x%02x at " TARGET_FMT_plx "\n", val, addr);
> + trace_rc4030_write(addr, val);
>
> switch (addr & ~0x3) {
> /* Global config register */
> @@ -475,7 +459,9 @@ static void rc4030_write(void *opaque, hwaddr addr, uint64_t data,
> case 0x0238:
> break;
> default:
> - RC4030_ERROR("invalid write of 0x%02x at [" TARGET_FMT_plx "]\n", val, addr);
> + qemu_log_mask(LOG_GUEST_ERROR,
> + "rc4030: invalid write of 0x%02x at 0x%x",
> + val, (int)addr);
> break;
> }
> }
> @@ -494,22 +480,6 @@ static void update_jazz_irq(rc4030State *s)
>
> pending = s->isr_jazz & s->imr_jazz;
>
> -#ifdef DEBUG_RC4030
> - if (s->isr_jazz != 0) {
> - uint32_t irq = 0;
> - DPRINTF("pending irqs:");
> - for (irq = 0; irq < ARRAY_SIZE(irq_names); irq++) {
> - if (s->isr_jazz & (1 << irq)) {
> - printf(" %s", irq_names[irq]);
> - if (!(s->imr_jazz & (1 << irq))) {
> - printf("(ignored)");
> - }
> - }
> - }
> - printf("\n");
> - }
> -#endif
> -
> if (pending != 0)
> qemu_irq_raise(s->jazz_bus_irq);
> else
> @@ -552,7 +522,6 @@ static uint64_t jazzio_read(void *opaque, hwaddr addr, unsigned int size)
> irq = 0;
> while (pending) {
> if (pending & 1) {
> - DPRINTF("returning irq %s\n", irq_names[irq]);
> val = (irq + 1) << 2;
> break;
> }
> @@ -566,11 +535,13 @@ static uint64_t jazzio_read(void *opaque, hwaddr addr, unsigned int size)
> val = s->imr_jazz;
> break;
> default:
> - RC4030_ERROR("(jazz io controller) invalid read [" TARGET_FMT_plx "]\n", addr);
> + qemu_log_mask(LOG_GUEST_ERROR,
> + "rc4030/jazzio: invalid read at 0x%x", (int)addr);
> val = 0;
> + break;
> }
>
> - DPRINTF("(jazz io controller) read 0x%04x at " TARGET_FMT_plx "\n", val, addr);
> + trace_jazzio_read(addr, val);
>
> return val;
> }
> @@ -582,7 +553,7 @@ static void jazzio_write(void *opaque, hwaddr addr, uint64_t data,
> uint32_t val = data;
> addr &= 0xfff;
>
> - DPRINTF("(jazz io controller) write 0x%04x at " TARGET_FMT_plx "\n", val, addr);
> + trace_jazzio_write(addr, val);
>
> switch (addr) {
> /* Local bus int enable mask */
> @@ -591,7 +562,9 @@ static void jazzio_write(void *opaque, hwaddr addr, uint64_t data,
> update_jazz_irq(s);
> break;
> default:
> - RC4030_ERROR("(jazz io controller) invalid write of 0x%04x at [" TARGET_FMT_plx "]\n", val, addr);
> + qemu_log_mask(LOG_GUEST_ERROR,
> + "rc4030/jazzio: invalid write of 0x%02x at 0x%x",
> + val, (int)addr);
> break;
> }
> }
> @@ -724,28 +697,6 @@ static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len, int is_wri
>
> s->dma_regs[n][DMA_REG_ENABLE] |= DMA_FLAG_TC_INTR;
> s->dma_regs[n][DMA_REG_COUNT] -= len;
> -
> -#ifdef DEBUG_RC4030_DMA
> - {
> - int i, j;
> - printf("rc4030 dma: Copying %d bytes %s host %p\n",
> - len, is_write ? "from" : "to", buf);
> - for (i = 0; i < len; i += 16) {
> - int n = 16;
> - if (n > len - i) {
> - n = len - i;
> - }
> - for (j = 0; j < n; j++)
> - printf("%02x ", buf[i + j]);
> - while (j++ < 16)
> - printf(" ");
> - printf("| ");
> - for (j = 0; j < n; j++)
> - printf("%c", isprint(buf[i + j]) ? buf[i + j] : '.');
> - printf("\n");
> - }
> - }
> -#endif
> }
>
> struct rc4030DMAState {
> diff --git a/trace-events b/trace-events
> index 11387c3..1443e84 100644
> --- a/trace-events
> +++ b/trace-events
> @@ -282,6 +282,12 @@ slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d cha
> slavio_timer_mem_writel_mode_invalid(void) "not system timer"
> slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64
>
> +# hw/dma/rc4030.c
> +jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
> +jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
> +rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
> +rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
> +
> # hw/dma/sparc32_dma.c
> ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
> ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2015-06-02 11:03 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-27 12:19 [Qemu-devel] [PATCH v2 00/17] net/dp8393x and dma/rc4030 improvements Hervé Poussineau
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 01/17] mips jazz: compile only in 64 bit little endian Hervé Poussineau
2015-06-02 11:02 ` Aurelien Jarno
2015-06-02 18:04 ` Hervé Poussineau
2015-06-02 19:08 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 02/17] dma/rc4030: create custom DMA address space Hervé Poussineau
2015-06-02 11:02 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 03/17] dma/rc4030: use AddressSpace and address_space_rw in users Hervé Poussineau
2015-06-02 11:02 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 04/17] dma/rc4030: do not use old_mmio accesses Hervé Poussineau
2015-06-02 11:03 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 05/17] dma/rc4030: document register at offset 0x210 Hervé Poussineau
2015-06-02 11:03 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 06/17] dma/rc4030: use trace events instead of custom logging Hervé Poussineau
2015-06-02 11:03 ` Aurelien Jarno [this message]
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 07/17] dma/rc4030: convert to QOM Hervé Poussineau
2015-06-02 11:03 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 08/17] net/dp8393x: always calculate proper checksums Hervé Poussineau
2015-06-02 11:03 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 09/17] net/dp8393x: do not use old_mmio accesses Hervé Poussineau
2015-06-02 11:03 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 10/17] net/dp8393x: use dp8393x_ prefix for all functions Hervé Poussineau
2015-06-02 11:04 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 11/17] net/dp8393x: QOM'ify Hervé Poussineau
2015-06-02 11:04 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 12/17] net/dp8393x: add PROM to store MAC address Hervé Poussineau
2015-06-02 11:04 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 13/17] net/dp8393x: add load/save support Hervé Poussineau
2015-06-02 11:04 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 14/17] net/dp8393x: correctly reset in_use field Hervé Poussineau
2015-06-02 11:04 ` Aurelien Jarno
2015-06-02 18:05 ` Hervé Poussineau
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 15/17] net/dp8393x: fix hardware reset Hervé Poussineau
2015-06-02 11:05 ` Aurelien Jarno
2015-05-27 12:19 ` [Qemu-devel] [PATCH v2 16/17] net/dp8393x: repair can_receive() method Hervé Poussineau
2015-06-02 11:05 ` Aurelien Jarno
2015-06-03 20:33 ` Hervé Poussineau
2015-05-27 12:20 ` [Qemu-devel] [PATCH v2 17/17] [RFC] dma/rc4030: do multiple calls to address_space_rw when doing DMA transfers Hervé Poussineau
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