From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60613) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yzjyh-0006Qz-9I for qemu-devel@nongnu.org; Tue, 02 Jun 2015 07:03:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Yzjye-0004gb-NJ for qemu-devel@nongnu.org; Tue, 02 Jun 2015 07:03:27 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:59799) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Yzjye-0004gH-Dz for qemu-devel@nongnu.org; Tue, 02 Jun 2015 07:03:24 -0400 Date: Tue, 2 Jun 2015 13:03:23 +0200 From: Aurelien Jarno Message-ID: <20150602110323.GF26298@aurel32.net> References: <1432729200-5322-1-git-send-email-hpoussin@reactos.org> <1432729200-5322-7-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: <1432729200-5322-7-git-send-email-hpoussin@reactos.org> Sender: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH v2 06/17] dma/rc4030: use trace events instead of custom logging List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-15?Q?Herv=E9?= Poussineau Cc: Leon Alrae , qemu-devel@nongnu.org On 2015-05-27 14:19, Herv=E9 Poussineau wrote: > Remove also unneeded debug logs. >=20 > Signed-off-by: Herv=E9 Poussineau > --- > hw/dma/rc4030.c | 81 ++++++++++++---------------------------------------= ------ > trace-events | 6 +++++ > 2 files changed, 22 insertions(+), 65 deletions(-) >=20 > diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c > index bf82eed..55844ed 100644 > --- a/hw/dma/rc4030.c > +++ b/hw/dma/rc4030.c > @@ -26,24 +26,7 @@ > #include "hw/mips/mips.h" > #include "qemu/timer.h" > #include "exec/address-spaces.h" > - > -/********************************************************/ > -/* debug rc4030 */ > - > -//#define DEBUG_RC4030 > -//#define DEBUG_RC4030_DMA > - > -#ifdef DEBUG_RC4030 > -#define DPRINTF(fmt, ...) \ > -do { printf("rc4030: " fmt , ## __VA_ARGS__); } while (0) > -static const char* irq_names[] =3D { "parallel", "floppy", "sound", "vid= eo", > - "network", "scsi", "keyboard", "mouse", "serial0", "serial1"= }; > -#else > -#define DPRINTF(fmt, ...) > -#endif > - > -#define RC4030_ERROR(fmt, ...) \ > -do { fprintf(stderr, "rc4030 ERROR: %s: " fmt, __func__ , ## __VA_ARGS__= ); } while (0) > +#include "trace.h" > =20 > /********************************************************/ > /* rc4030 emulation */ > @@ -251,13 +234,14 @@ static uint64_t rc4030_read(void *opaque, hwaddr ad= dr, unsigned int size) > val =3D 7; /* FIXME: should be read from EISA controller */ > break; > default: > - RC4030_ERROR("invalid read [" TARGET_FMT_plx "]\n", addr); > + qemu_log_mask(LOG_GUEST_ERROR, > + "rc4030: invalid read at 0x%x", (int)addr); > val =3D 0; > break; > } > =20 > if ((addr & ~3) !=3D 0x230) { > - DPRINTF("read 0x%02x at " TARGET_FMT_plx "\n", val, addr); > + trace_rc4030_read(addr, val); > } > =20 > return val; > @@ -360,7 +344,7 @@ static void rc4030_write(void *opaque, hwaddr addr, u= int64_t data, > uint32_t val =3D data; > addr &=3D 0x3fff; > =20 > - DPRINTF("write 0x%02x at " TARGET_FMT_plx "\n", val, addr); > + trace_rc4030_write(addr, val); > =20 > switch (addr & ~0x3) { > /* Global config register */ > @@ -475,7 +459,9 @@ static void rc4030_write(void *opaque, hwaddr addr, u= int64_t data, > case 0x0238: > break; > default: > - RC4030_ERROR("invalid write of 0x%02x at [" TARGET_FMT_plx "]\n"= , val, addr); > + qemu_log_mask(LOG_GUEST_ERROR, > + "rc4030: invalid write of 0x%02x at 0x%x", > + val, (int)addr); > break; > } > } > @@ -494,22 +480,6 @@ static void update_jazz_irq(rc4030State *s) > =20 > pending =3D s->isr_jazz & s->imr_jazz; > =20 > -#ifdef DEBUG_RC4030 > - if (s->isr_jazz !=3D 0) { > - uint32_t irq =3D 0; > - DPRINTF("pending irqs:"); > - for (irq =3D 0; irq < ARRAY_SIZE(irq_names); irq++) { > - if (s->isr_jazz & (1 << irq)) { > - printf(" %s", irq_names[irq]); > - if (!(s->imr_jazz & (1 << irq))) { > - printf("(ignored)"); > - } > - } > - } > - printf("\n"); > - } > -#endif > - > if (pending !=3D 0) > qemu_irq_raise(s->jazz_bus_irq); > else > @@ -552,7 +522,6 @@ static uint64_t jazzio_read(void *opaque, hwaddr addr= , unsigned int size) > irq =3D 0; > while (pending) { > if (pending & 1) { > - DPRINTF("returning irq %s\n", irq_names[irq]); > val =3D (irq + 1) << 2; > break; > } > @@ -566,11 +535,13 @@ static uint64_t jazzio_read(void *opaque, hwaddr ad= dr, unsigned int size) > val =3D s->imr_jazz; > break; > default: > - RC4030_ERROR("(jazz io controller) invalid read [" TARGET_FMT_pl= x "]\n", addr); > + qemu_log_mask(LOG_GUEST_ERROR, > + "rc4030/jazzio: invalid read at 0x%x", (int)addr); > val =3D 0; > + break; > } > =20 > - DPRINTF("(jazz io controller) read 0x%04x at " TARGET_FMT_plx "\n", = val, addr); > + trace_jazzio_read(addr, val); > =20 > return val; > } > @@ -582,7 +553,7 @@ static void jazzio_write(void *opaque, hwaddr addr, u= int64_t data, > uint32_t val =3D data; > addr &=3D 0xfff; > =20 > - DPRINTF("(jazz io controller) write 0x%04x at " TARGET_FMT_plx "\n",= val, addr); > + trace_jazzio_write(addr, val); > =20 > switch (addr) { > /* Local bus int enable mask */ > @@ -591,7 +562,9 @@ static void jazzio_write(void *opaque, hwaddr addr, u= int64_t data, > update_jazz_irq(s); > break; > default: > - RC4030_ERROR("(jazz io controller) invalid write of 0x%04x at ["= TARGET_FMT_plx "]\n", val, addr); > + qemu_log_mask(LOG_GUEST_ERROR, > + "rc4030/jazzio: invalid write of 0x%02x at 0x%x", > + val, (int)addr); > break; > } > } > @@ -724,28 +697,6 @@ static void rc4030_do_dma(void *opaque, int n, uint8= _t *buf, int len, int is_wri > =20 > s->dma_regs[n][DMA_REG_ENABLE] |=3D DMA_FLAG_TC_INTR; > s->dma_regs[n][DMA_REG_COUNT] -=3D len; > - > -#ifdef DEBUG_RC4030_DMA > - { > - int i, j; > - printf("rc4030 dma: Copying %d bytes %s host %p\n", > - len, is_write ? "from" : "to", buf); > - for (i =3D 0; i < len; i +=3D 16) { > - int n =3D 16; > - if (n > len - i) { > - n =3D len - i; > - } > - for (j =3D 0; j < n; j++) > - printf("%02x ", buf[i + j]); > - while (j++ < 16) > - printf(" "); > - printf("| "); > - for (j =3D 0; j < n; j++) > - printf("%c", isprint(buf[i + j]) ? buf[i + j] : '.'); > - printf("\n"); > - } > - } > -#endif > } > =20 > struct rc4030DMAState { > diff --git a/trace-events b/trace-events > index 11387c3..1443e84 100644 > --- a/trace-events > +++ b/trace-events > @@ -282,6 +282,12 @@ slavio_timer_mem_writel_mode_counter(unsigned int ti= mer_index) "processor %d cha > slavio_timer_mem_writel_mode_invalid(void) "not system timer" > slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"= PRIx64 > =20 > +# hw/dma/rc4030.c > +jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] =3D 0x%x" > +jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] =3D 0x= %x" > +rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] =3D 0x%x" > +rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] =3D 0x= %x" > + > # hw/dma/sparc32_dma.c > ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64 > ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64 Reviewed-by: Aurelien Jarno --=20 Aurelien Jarno GPG: 4096R/1DDD8C9B aurelien@aurel32.net http://www.aurel32.net