[Qemu-devel] [PATCH 0/2] sh4 linux-user cpu and hwcap

[Qemu-devel] [PATCH 0/2] sh4 linux-user cpu and hwcap

[Richard Henderson]

As reported by Rich the other day.  As I don't have a user-land
binary that depends on this, I merely note that it still runs 
the linux-user-test sh4 binary.  And gdb confirms that the LLSC
bit does get set.

Rich, can you confirm that this is good enough for your musl test?


r~


Richard Henderson (2):
  linux-user: Default sh4 to sh7785
  linux-user: Add HWCAP for SH4

 linux-user/elfload.c | 29 +++++++++++++++++++++++++++++
 linux-user/main.c    |  2 ++
 2 files changed, 31 insertions(+)

-- 
2.1.0

[Qemu-devel] [PATCH 1/2] linux-user: Default sh4 to sh7785

[Richard Henderson]

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 linux-user/main.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/linux-user/main.c b/linux-user/main.c
index 3f32db0..7e0a439 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -3929,6 +3929,8 @@ int main(int argc, char **argv, char **envp)
 # else
         cpu_model = "750";
 # endif
+#elif defined TARGET_SH4
+        cpu_model = TYPE_SH7785_CPU;
 #else
         cpu_model = "any";
 #endif
-- 
2.1.0

[Qemu-devel] [PATCH 2/2] linux-user: Add HWCAP for SH4

[Richard Henderson]

Only exposing FPU and LLSC as the only features
supported by the translator.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 linux-user/elfload.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 0ba9706..b71e866 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -1075,6 +1075,35 @@ static inline void elf_core_copy_regs(target_elf_gregset_t *regs,
 #define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE        4096
 
+enum {
+    SH_CPU_HAS_FPU            = 0x0001, /* Hardware FPU support */
+    SH_CPU_HAS_P2_FLUSH_BUG   = 0x0002, /* Need to flush the cache in P2 area */
+    SH_CPU_HAS_MMU_PAGE_ASSOC = 0x0004, /* SH3: TLB way selection bit support */
+    SH_CPU_HAS_DSP            = 0x0008, /* SH-DSP: DSP support */
+    SH_CPU_HAS_PERF_COUNTER   = 0x0010, /* Hardware performance counters */
+    SH_CPU_HAS_PTEA           = 0x0020, /* PTEA register */
+    SH_CPU_HAS_LLSC           = 0x0040, /* movli.l/movco.l */
+    SH_CPU_HAS_L2_CACHE       = 0x0080, /* Secondary cache / URAM */
+    SH_CPU_HAS_OP32           = 0x0100, /* 32-bit instruction support */
+    SH_CPU_HAS_PTEAEX         = 0x0200, /* PTE ASID Extension support */
+};
+
+#define ELF_HWCAP get_elf_hwcap()
+
+static uint32_t get_elf_hwcap(void)
+{
+    SuperHCPU *cpu = SUPERH_CPU(thread_cpu);
+    uint32_t hwcap = 0;
+
+    hwcap |= SH_CPU_HAS_FPU;
+
+    if (cpu->env.features & SH_FEATURE_SH4A) {
+        hwcap |= SH_CPU_HAS_LLSC;
+    }
+
+    return hwcap;
+}
+
 #endif
 
 #ifdef TARGET_CRIS
-- 
2.1.0

Re: [Qemu-devel] [PATCH 1/2] linux-user: Default sh4 to sh7785

[Aurelien Jarno]

On 2015-05-23 15:06, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  linux-user/main.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/linux-user/main.c b/linux-user/main.c
> index 3f32db0..7e0a439 100644
> --- a/linux-user/main.c
> +++ b/linux-user/main.c
> @@ -3929,6 +3929,8 @@ int main(int argc, char **argv, char **envp)
>  # else
>          cpu_model = "750";
>  # endif
> +#elif defined TARGET_SH4
> +        cpu_model = TYPE_SH7785_CPU;
>  #else
>          cpu_model = "any";
>  #endif

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net

Re: [Qemu-devel] [PATCH 2/2] linux-user: Add HWCAP for SH4

[Aurelien Jarno]

On 2015-05-23 15:06, Richard Henderson wrote:
> Only exposing FPU and LLSC as the only features
> supported by the translator.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  linux-user/elfload.c | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/linux-user/elfload.c b/linux-user/elfload.c
> index 0ba9706..b71e866 100644
> --- a/linux-user/elfload.c
> +++ b/linux-user/elfload.c
> @@ -1075,6 +1075,35 @@ static inline void elf_core_copy_regs(target_elf_gregset_t *regs,
>  #define USE_ELF_CORE_DUMP
>  #define ELF_EXEC_PAGESIZE        4096
>  
> +enum {
> +    SH_CPU_HAS_FPU            = 0x0001, /* Hardware FPU support */
> +    SH_CPU_HAS_P2_FLUSH_BUG   = 0x0002, /* Need to flush the cache in P2 area */
> +    SH_CPU_HAS_MMU_PAGE_ASSOC = 0x0004, /* SH3: TLB way selection bit support */
> +    SH_CPU_HAS_DSP            = 0x0008, /* SH-DSP: DSP support */
> +    SH_CPU_HAS_PERF_COUNTER   = 0x0010, /* Hardware performance counters */
> +    SH_CPU_HAS_PTEA           = 0x0020, /* PTEA register */
> +    SH_CPU_HAS_LLSC           = 0x0040, /* movli.l/movco.l */
> +    SH_CPU_HAS_L2_CACHE       = 0x0080, /* Secondary cache / URAM */
> +    SH_CPU_HAS_OP32           = 0x0100, /* 32-bit instruction support */
> +    SH_CPU_HAS_PTEAEX         = 0x0200, /* PTE ASID Extension support */
> +};
> +
> +#define ELF_HWCAP get_elf_hwcap()
> +
> +static uint32_t get_elf_hwcap(void)
> +{
> +    SuperHCPU *cpu = SUPERH_CPU(thread_cpu);
> +    uint32_t hwcap = 0;
> +
> +    hwcap |= SH_CPU_HAS_FPU;
> +
> +    if (cpu->env.features & SH_FEATURE_SH4A) {
> +        hwcap |= SH_CPU_HAS_LLSC;
> +    }
> +
> +    return hwcap;
> +}
> +
>  #endif
>  
>  #ifdef TARGET_CRIS

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
 

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net

Re: [Qemu-devel] [PATCH 0/2] sh4 linux-user cpu and hwcap

[Aurelien Jarno]

On 2015-05-23 15:06, Richard Henderson wrote:
> As reported by Rich the other day.  As I don't have a user-land
> binary that depends on this, I merely note that it still runs 
> the linux-user-test sh4 binary.  And gdb confirms that the LLSC
> bit does get set.

How would you like to see this patches merged? As they basically touch
linux-user code only, I think they should go through Riku.

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net

Re: [Qemu-devel] [PATCH 0/2] sh4 linux-user cpu and hwcap

[Rich Felker]

On Sat, May 23, 2015 at 03:06:52PM -0700, Richard Henderson wrote:
> As reported by Rich the other day.  As I don't have a user-land
> binary that depends on this, I merely note that it still runs 
> the linux-user-test sh4 binary.  And gdb confirms that the LLSC
> bit does get set.
> 
> Rich, can you confirm that this is good enough for your musl test?

I haven't had a chance to build qemu from source with them applied,
but in principle they look correct, and they should be fine as long as
they do what they claim to (changing cpu default for user, and adding
hwcap with the LLSC cap set).

Rich

Re: [Qemu-devel] [PATCH 0/2] sh4 linux-user cpu and hwcap

[Richard Henderson]

On 05/24/2015 03:51 PM, Aurelien Jarno wrote:
> On 2015-05-23 15:06, Richard Henderson wrote:
>> As reported by Rich the other day.  As I don't have a user-land
>> binary that depends on this, I merely note that it still runs
>> the linux-user-test sh4 binary.  And gdb confirms that the LLSC
>> bit does get set.
>
> How would you like to see this patches merged? As they basically touch
> linux-user code only, I think they should go through Riku.
>

Ideally, but maybe just easier to generate a pull.


r~

Re: [Qemu-devel] [PATCH 0/2] sh4 linux-user cpu and hwcap

[Aurelien Jarno]

On 2015-06-02 21:50, Richard Henderson wrote:
> On 05/24/2015 03:51 PM, Aurelien Jarno wrote:
> >On 2015-05-23 15:06, Richard Henderson wrote:
> >>As reported by Rich the other day.  As I don't have a user-land
> >>binary that depends on this, I merely note that it still runs
> >>the linux-user-test sh4 binary.  And gdb confirms that the LLSC
> >>bit does get set.
> >
> >How would you like to see this patches merged? As they basically touch
> >linux-user code only, I think they should go through Riku.
> >
> 
> Ideally, but maybe just easier to generate a pull.

I have added them in my sh4-next branch [1], they will be in the next
pull request.

[1] http://git.aurel32.net/?p=qemu.git;a=shortlog;h=refs/heads/sh4-next

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net

Re: [Qemu-devel] [PATCH 0/2] sh4 linux-user cpu and hwcap

[Riku Voipio]

On Thursday, June 4, 2015 10:55:12 PM EEST, Aurelien Jarno wrote:
> On 2015-06-02 21:50, Richard Henderson wrote:
>> On 05/24/2015 03:51 PM, Aurelien Jarno wrote: ...

> I have added them in my sh4-next branch [1], they will be in the next
> pull request.

> [1] http://git.aurel32.net/?p=qemu.git;a=shortlog;h=refs/heads/sh4-next

A bit late, but I'm ok for merging these patches via sh4 tree. If you still 
going to edit branch, you can add my

Acked-by: Riku Voipio <riku.voipio@linaro.org>

Riku

Re: [Qemu-devel] [PATCH 0/2] sh4 linux-user cpu and hwcap

[Aurelien Jarno]

On 2015-06-12 16:12, Riku Voipio wrote:
> On Thursday, June 4, 2015 10:55:12 PM EEST, Aurelien Jarno wrote:
> >On 2015-06-02 21:50, Richard Henderson wrote:
> >>On 05/24/2015 03:51 PM, Aurelien Jarno wrote: ...
> 
> >I have added them in my sh4-next branch [1], they will be in the next
> >pull request.
> 
> >[1] http://git.aurel32.net/?p=qemu.git;a=shortlog;h=refs/heads/sh4-next
> 
> A bit late, but I'm ok for merging these patches via sh4 tree. If you still
> going to edit branch, you can add my
> 
> Acked-by: Riku Voipio <riku.voipio@linaro.org>

It looks like it's too late, sorry about that.

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net