From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
To: Alistair Francis <alistair.francis@xilinx.com>
Cc: peter.crosthwaite@xilinx.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH RESEND v1 4/8] target-microblaze: Convert version_mask to a CPU property
Date: Fri, 5 Jun 2015 10:42:28 +1000 [thread overview]
Message-ID: <20150605004228.GS17878@toto> (raw)
In-Reply-To: <57226a4c66535a5fb77dddbf2c8765e3cf818622.1433314301.git.alistair.francis@xilinx.com>
On Thu, Jun 04, 2015 at 11:23:19AM +1000, Alistair Francis wrote:
> Originally the version_mask PVR bits were manually set for each
> machine. This is a hassle and difficult to read, instead set them
> based on the CPU properties.
>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> ---
> hw/microblaze/petalogix_ml605_mmu.c | 3 ++-
> target-microblaze/cpu-qom.h | 1 +
> target-microblaze/cpu.c | 4 +++-
> 3 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
> index 5f341c4..f52654c 100644
> --- a/hw/microblaze/petalogix_ml605_mmu.c
> +++ b/hw/microblaze/petalogix_ml605_mmu.c
> @@ -70,7 +70,7 @@ static void machine_cpu_reset(MicroBlazeCPU *cpu)
>
> env->pvr.regs[10] = 0x0e000000; /* virtex 6 */
> /* setup pvr to match kernel setting */
> - env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8);
> + env->pvr.regs[0] |= (0x14 << 8);
> env->pvr.regs[4] = 0xc56b8000;
> env->pvr.regs[5] = 0xc56be000;
> }
> @@ -99,6 +99,7 @@ petalogix_ml605_init(MachineState *machine)
> object_property_set_bool(OBJECT(cpu), true, "dcache-writeback",
> &error_abort);
> object_property_set_bool(OBJECT(cpu), true, "endi", &error_abort);
> + object_property_set_bool(OBJECT(cpu), true, "version_mask", &error_abort);
> object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort);
>
> /* Attach emulated BRAM through the LMB. */
> diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h
> index 85b8f75..b6c6374 100644
> --- a/target-microblaze/cpu-qom.h
> +++ b/target-microblaze/cpu-qom.h
> @@ -67,6 +67,7 @@ typedef struct MicroBlazeCPU {
> bool usemmu;
> bool dcache_writeback;
> bool endi;
> + bool version_mask;
> } cfg;
>
> CPUMBState env;
> diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
> index f40df43..849c737 100644
> --- a/target-microblaze/cpu.c
> +++ b/target-microblaze/cpu.c
> @@ -115,7 +115,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
> env->pvr.regs[0] |= (cpu->cfg.stackprot ? PVR0_SPROT_MASK : 0) |
> (cpu->cfg.usefpu ? PVR0_USE_FPU_MASK : 0) |
> (cpu->cfg.usemmu ? PVR0_USE_MMU_MASK : 0) |
> - (cpu->cfg.endi ? PVR0_ENDI_MASK : 0);
> + (cpu->cfg.endi ? PVR0_ENDI_MASK : 0) |
> + (cpu->cfg.endi ? ~PVR0_VERSION_MASK : 0);
This looks wrong...
My guess is that this should be:
cpu->cfg.version_mask ? PVR0_VERSION_MASK : 0
and that maybe the ml605_mmu board is trying to disable the version mask,
e.g setting it to false.
Can you double check that it matches with dts and specs?
>
> env->pvr.regs[2] |= (cpu->cfg.usefpu ? PVR2_USE_FPU_MASK : 0) |
> (cpu->cfg.usefpu > 1 ? PVR2_USE_FPU2_MASK : 0);
> @@ -176,6 +177,7 @@ static Property mb_properties[] = {
> DEFINE_PROP_BOOL("dcache-writeback", MicroBlazeCPU, cfg.dcache_writeback,
> false),
> DEFINE_PROP_BOOL("endi", MicroBlazeCPU, cfg.endi, false),
> + DEFINE_PROP_BOOL("version-mask", MicroBlazeCPU, cfg.version_mask, false),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> --
> 1.7.1
>
next prev parent reply other threads:[~2015-06-05 0:46 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-03 6:56 [Qemu-devel] [PATCH v1 0/8] Extend Microblaze Properties Alistair Francis
2015-06-03 6:58 ` [Qemu-devel] [PATCH v1 3/8] target-microblaze: Convert endi to a CPU property Alistair Francis
2015-06-05 0:37 ` [Qemu-devel] [PATCH RESEND " Edgar E. Iglesias
2015-06-05 0:40 ` Edgar E. Iglesias
2015-06-05 2:21 ` Alistair Francis
2015-06-03 6:59 ` [Qemu-devel] [PATCH v1 4/8] target-microblaze: Convert version_mask " Alistair Francis
2015-06-05 0:42 ` Edgar E. Iglesias [this message]
2015-06-05 2:51 ` [Qemu-devel] [PATCH RESEND " Alistair Francis
2015-06-05 2:53 ` Alistair Francis
2015-06-05 2:54 ` Edgar E. Iglesias
2015-06-05 3:20 ` Alistair Francis
2015-06-03 6:59 ` [Qemu-devel] [PATCH v1 5/8] target-microblaze: Convert pvr-full " Alistair Francis
2015-06-05 0:44 ` [Qemu-devel] [PATCH RESEND " Edgar E. Iglesias
2015-06-05 3:00 ` Alistair Francis
2015-06-03 7:00 ` [Qemu-devel] [PATCH v1 6/8] ml605_mmu: Move the hardcoded values to the init function Alistair Francis
2015-06-05 0:47 ` [Qemu-devel] [PATCH RESEND " Edgar E. Iglesias
2015-06-05 4:54 ` Alistair Francis
2015-06-03 7:01 ` [Qemu-devel] [PATCH v1 7/8] s3adsp1800: Remove the hardcoded values from the reset Alistair Francis
2015-06-05 0:47 ` [Qemu-devel] [PATCH RESEND " Edgar E. Iglesias
2015-06-03 7:01 ` [Qemu-devel] [PATCH v1 8/8] target-microblaze: Remove dead code Alistair Francis
2015-06-05 0:48 ` [Qemu-devel] [PATCH RESEND " Edgar E. Iglesias
2015-06-05 0:28 ` [Qemu-devel] [PATCH RESEND v1 2/8] target-microblaze: Convert dcache-writeback to a CPU property Alistair Francis
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150605004228.GS17878@toto \
--to=edgar.iglesias@xilinx.com \
--cc=alistair.francis@xilinx.com \
--cc=peter.crosthwaite@xilinx.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).