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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Gerd Hoffmann <kraxel@redhat.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>,
	lersek@redhat.com, Kevin O'Connor <kevin@koconnor.net>,
	seabios@seabios.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH V2] pci: fixes to allow booting from extra root pci buses.
Date: Mon, 15 Jun 2015 11:43:58 +0200	[thread overview]
Message-ID: <20150615114145-mutt-send-email-mst@redhat.com> (raw)
In-Reply-To: <1434348068.31654.15.camel@redhat.com>

On Mon, Jun 15, 2015 at 08:01:08AM +0200, Gerd Hoffmann wrote:
> On Fr, 2015-06-12 at 09:23 -0400, Kevin O'Connor wrote:
> > On Fri, Jun 12, 2015 at 03:17:27PM +0300, Marcel Apfelbaum wrote:
> > > On 06/12/2015 09:00 AM, Gerd Hoffmann wrote:
> > > >>On each boot, coreboot might decide to assign a different bus id to
> > > >>the extra roots (for example, if a device with a PCI bridge is
> > > >>inserted and it's bus allocation causes bus ids to shift).
> > > >>Technically, coreboot could even change the order extra buses are
> > > >>assigned bus ids, but doesn't today.
> > > >>
> > > >>This was seen on several AMD systems - I'm told at least some Intel
> > > >>systems have multiple root buses, but the bus numbers are just hard
> > > >>wired.
> > > >
> > > >This is how the qemu pxb works: root bus numbers are a config option for
> > > >the root bridge device, i.e. from the guest point of view they are
> > > >hard-wired.
> > > Exactly. In our case, the HW assigns the PXB bus bumber, and again,
> > > I saw this also on real HW with multiple buses, the bus nr comes
> > > from ACPI, meaning the vendor.
> > 
> > I'm confused where ACPI comes into this.  In all cases I know of, the
> > firmware generates the ACPI tables to match the hardware.  I've never
> > heard of hardware configuring itself from the ACPI tables.
> 
> We have basically the same model in qemu, except that it isn't the
> firmware but qemu generating the tables (and qemu looks at the registers
> programmed by the firmware to make sure things match).
> 
> The pxb has no registers to program, the hardware just shows up on a bus
> number (qemu cfg, hard-wired for the guest).  ACPI must specify it so
> the guest OS finds it.  When passing bus numbers via fw_cfg the must
> match acpi of course.
> 
> I'm wondering whenever things become easier if we add config registers
> to the pxb, where the firmware can program the bus number range and we
> can use the config register base as a way to specify which pxb we are
> referring to ?
> 
> cheers,
>   Gerd
> 

But then we'll need a bunch of fw cfg entries to let guest
discover the extra roots and their bus ranges.

-- 
MST

  parent reply	other threads:[~2015-06-15  9:44 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-11 13:37 [Qemu-devel] [PATCH V2] pci: fixes to allow booting from extra root pci buses Marcel Apfelbaum
2015-06-11 13:57 ` Laszlo Ersek
2015-06-11 13:58 ` Kevin O'Connor
2015-06-11 14:12   ` Marcel Apfelbaum
2015-06-11 14:24     ` Kevin O'Connor
2015-06-11 14:36       ` Marcel Apfelbaum
2015-06-11 15:00         ` Laszlo Ersek
2015-06-11 16:54         ` Kevin O'Connor
2015-06-11 17:46           ` Marcel Apfelbaum
2015-06-11 18:34             ` Laszlo Ersek
2015-06-11 19:24               ` Kevin O'Connor
2015-06-12  9:25                 ` Laszlo Ersek
2015-06-12 13:03                   ` Kevin O'Connor
2015-06-12 15:45                     ` Laszlo Ersek
2015-06-12 18:40                       ` Kevin O'Connor
2015-06-12 20:13                         ` Laszlo Ersek
2015-06-14 12:05                         ` Michael S. Tsirkin
2015-06-14 14:50                           ` Kevin O'Connor
2015-06-14 18:06                             ` Michael S. Tsirkin
2015-06-14 18:21                               ` Kevin O'Connor
2015-06-14 21:39                               ` Benjamin Herrenschmidt
2015-06-14 21:59                                 ` Kevin O'Connor
2015-06-15  2:50                                   ` Benjamin Herrenschmidt
2015-06-15  8:22                                     ` Michael S. Tsirkin
2015-06-11 19:10             ` Kevin O'Connor
2015-06-12  6:00               ` Gerd Hoffmann
2015-06-12 12:17                 ` Marcel Apfelbaum
2015-06-12 13:23                   ` Kevin O'Connor
2015-06-15  6:01                     ` Gerd Hoffmann
2015-06-15  6:50                       ` Gerd Hoffmann
2015-06-15  9:02                         ` Marcel Apfelbaum
2015-06-15  9:43                       ` Michael S. Tsirkin [this message]
2015-06-15 10:18                         ` Gerd Hoffmann
2015-06-15 10:26                           ` Michael S. Tsirkin
2015-06-11 14:35   ` Laszlo Ersek
2015-06-11 16:48     ` Kevin O'Connor
2015-06-11 18:38       ` [Qemu-devel] [SeaBIOS] " Laszlo Ersek
2015-06-14 12:10       ` [Qemu-devel] " Michael S. Tsirkin
2015-06-14 13:47         ` Kevin O'Connor

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