From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46429) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5DSt-0007pF-Gp for qemu-devel@nongnu.org; Wed, 17 Jun 2015 09:33:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z5DSo-0003YM-Q0 for qemu-devel@nongnu.org; Wed, 17 Jun 2015 09:33:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33171) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5DSo-0003YE-LG for qemu-devel@nongnu.org; Wed, 17 Jun 2015 09:33:10 -0400 Date: Wed, 17 Jun 2015 15:33:07 +0200 From: "Michael S. Tsirkin" Message-ID: <20150617152800-mutt-send-email-mst@redhat.com> References: <1433023482-25721-1-git-send-email-pcacjr@zytor.com> <1433202521-3094-1-git-send-email-pcacjr@zytor.com> <1433202521-3094-2-git-send-email-pcacjr@zytor.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1433202521-3094-2-git-send-email-pcacjr@zytor.com> Subject: Re: [Qemu-devel] [PATCH v3 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paulo Alcantara Cc: pbonzini@redhat.com, seabios@seabios.org, Paulo Alcantara , qemu-devel@nongnu.org On Mon, Jun 01, 2015 at 08:48:40PM -0300, Paulo Alcantara wrote: > v1 -> v2: > * s/PDRC/CCR/ for clarity and match ICH9 spec > * remove unnecessary OperationRegion for RCRB changelog should come after ---. An empty commit log is too terse I think. Could you quote spec in the changelog? > Signed-off-by: Paulo Alcantara > --- > hw/i386/q35-acpi-dsdt.dsl | 14 ++++++++++++++ > tests/acpi-test-data/q35/DSDT | Bin 7666 -> 7723 bytes > 2 files changed, 14 insertions(+) > > diff --git a/hw/i386/q35-acpi-dsdt.dsl b/hw/i386/q35-acpi-dsdt.dsl > index 16eaca3..92675c8 100644 > --- a/hw/i386/q35-acpi-dsdt.dsl > +++ b/hw/i386/q35-acpi-dsdt.dsl > @@ -114,6 +114,20 @@ DefinitionBlock ( > } > } > > +/**************************************************************** > + * Chipset Configuration Registers > + ****************************************************************/ > +Scope(\_SB.PCI0) { > + Device (CCR) { > + Name (_HID, EISAID("PNP0C02")) > + Name (_UID, 1) > + > + Name (_CRS, ResourceTemplate() { > + Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA Indent a bit more please. > + }) > + } > +} > + > #include "acpi-dsdt-hpet.dsl" > > > diff --git a/tests/acpi-test-data/q35/DSDT b/tests/acpi-test-data/q35/DSDT > index 4723e5954dccb00995ccaf521b7daf6bf15cf1d4..f3bda7b54ea6d669b1498d9380e7781207fb6e49 100644 > GIT binary patch > delta 81 > zcmexlz1oJ$CDxbTJfnq$UVN}qe1Nm3L3ERjvvW{9N4$rp3y lP)`>|j(F#wU_n7HzBWz > delta 24 > gcmZ2&^U0daCD > -- > 2.1.0