* [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites @ 2015-06-16 5:30 Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 1/7] spapr: Consider max_cpus during xics initialization Bharata B Rao ` (7 more replies) 0 siblings, 8 replies; 10+ messages in thread From: Bharata B Rao @ 2015-06-16 5:30 UTC (permalink / raw) To: qemu-devel Cc: thuth, aik, mdroth, agraf, qemu-ppc, tyreld, Bharata B Rao, nfont, david Hi, This patchset carries the changes that are pre-requisites to support CPU hotplug for sPAPR guests. Changes in v5 ------------- - Fixed indentation issues pointed by Alexey. - Removed the user of MSR_EP with the understanding that this or an equivalent define can be used/introduced in a separate patch. - Dropped the last patch "xics_kvm: Add cpu_destroy method to XICS" since it wasn't being used in this series. v4 - http://lists.nongnu.org/archive/html/qemu-devel/2015-06/msg01653.html This series applies against spapr-next branch of David Gibson's tree. Bharata B Rao (7): spapr: Consider max_cpus during xics initialization spapr: Support ibm,lrdr-capacity device tree property cpus: Add a macro to walk CPUs in reverse spapr: Reorganize CPU dt generation code spapr: Consolidate cpu init code into a routine ppc: Update cpu_model in MachineState xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled docs/specs/ppc-spapr-hotplug.txt | 18 ++ hw/intc/xics_kvm.c | 10 ++ hw/ppc/mac_newworld.c | 10 +- hw/ppc/mac_oldworld.c | 7 +- hw/ppc/ppc440_bamboo.c | 7 +- hw/ppc/prep.c | 7 +- hw/ppc/spapr.c | 349 ++++++++++++++++++++++----------------- hw/ppc/spapr_rtas.c | 16 ++ hw/ppc/virtex_ml507.c | 7 +- include/hw/ppc/spapr.h | 2 + include/hw/ppc/xics.h | 1 + include/qom/cpu.h | 2 + 12 files changed, 259 insertions(+), 177 deletions(-) -- 2.1.0 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v5 1/7] spapr: Consider max_cpus during xics initialization 2015-06-16 5:30 [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites Bharata B Rao @ 2015-06-16 5:30 ` Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 2/7] spapr: Support ibm, lrdr-capacity device tree property Bharata B Rao ` (6 subsequent siblings) 7 siblings, 0 replies; 10+ messages in thread From: Bharata B Rao @ 2015-06-16 5:30 UTC (permalink / raw) To: qemu-devel Cc: thuth, aik, mdroth, agraf, qemu-ppc, tyreld, Bharata B Rao, nfont, david Use max_cpus instead of smp_cpus when intializating xics system. Also report max_cpus in ibm,interrupt-server-ranges device tree property of interrupt controller node. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> --- hw/ppc/spapr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index acc7233..2d9fc9c 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -308,7 +308,7 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base, GString *hypertas = g_string_sized_new(256); GString *qemu_hypertas = g_string_sized_new(256); uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)}; - uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)}; + uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(max_cpus)}; int smt = kvmppc_smt_threads(); unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80}; QemuOpts *opts = qemu_opts_find(qemu_find_opts("smp-opts"), NULL); @@ -1454,7 +1454,7 @@ static void ppc_spapr_init(MachineState *machine) /* Set up Interrupt Controller before we create the VCPUs */ spapr->icp = xics_system_init(machine, - DIV_ROUND_UP(smp_cpus * kvmppc_smt_threads(), + DIV_ROUND_UP(max_cpus * kvmppc_smt_threads(), smp_threads), XICS_IRQS); -- 2.1.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v5 2/7] spapr: Support ibm, lrdr-capacity device tree property 2015-06-16 5:30 [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 1/7] spapr: Consider max_cpus during xics initialization Bharata B Rao @ 2015-06-16 5:30 ` Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 3/7] cpus: Add a macro to walk CPUs in reverse Bharata B Rao ` (5 subsequent siblings) 7 siblings, 0 replies; 10+ messages in thread From: Bharata B Rao @ 2015-06-16 5:30 UTC (permalink / raw) To: qemu-devel Cc: thuth, aik, mdroth, agraf, qemu-ppc, tyreld, Bharata B Rao, nfont, david Add support for ibm,lrdr-capacity since this is needed by the guest kernel to know about the possible hot-pluggable CPUs and Memory. With this, pseries kernels will start reporting correct maxcpus in /sys/devices/system/cpu/possible. Also define the minimum hotpluggable memory size as 256MB. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> --- docs/specs/ppc-spapr-hotplug.txt | 18 ++++++++++++++++++ hw/ppc/spapr_rtas.c | 16 ++++++++++++++++ include/hw/ppc/spapr.h | 2 ++ 3 files changed, 36 insertions(+) diff --git a/docs/specs/ppc-spapr-hotplug.txt b/docs/specs/ppc-spapr-hotplug.txt index d35771c..46e0719 100644 --- a/docs/specs/ppc-spapr-hotplug.txt +++ b/docs/specs/ppc-spapr-hotplug.txt @@ -284,4 +284,22 @@ struct rtas_event_log_v6_hp { } drc; } QEMU_PACKED; +== ibm,lrdr-capacity == + +ibm,lrdr-capacity is a property in the /rtas device tree node that identifies +the dynamic reconfiguration capabilities of the guest. It consists of a triple +consisting of <phys>, <size> and <maxcpus>. + + <phys>, encoded in BE format represents the maximum address in bytes and + hence the maximum memory that can be allocated to the guest. + + <size>, encoded in BE format represents the size increments in which + memory can be hot-plugged to the guest. + + <maxcpus>, a BE-encoded integer, represents the maximum number of + processors that the guest can have. + +pseries guests use this property to note the maximum allowed CPUs for the +guest. + [1] http://thread.gmane.org/gmane.linux.ports.ppc.embedded/75350/focus=106867 diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 3b95dfc..592e504 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -29,6 +29,7 @@ #include "sysemu/char.h" #include "hw/qdev.h" #include "sysemu/device_tree.h" +#include "sysemu/cpus.h" #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" @@ -651,6 +652,8 @@ int spapr_rtas_device_tree_setup(void *fdt, hwaddr rtas_addr, { int ret; int i; + uint32_t lrdr_capacity[5]; + MachineState *machine = MACHINE(qdev_get_machine()); ret = fdt_add_mem_rsv(fdt, rtas_addr, rtas_size); if (ret < 0) { @@ -699,6 +702,19 @@ int spapr_rtas_device_tree_setup(void *fdt, hwaddr rtas_addr, } } + + lrdr_capacity[0] = cpu_to_be32(machine->maxram_size >> 32); + lrdr_capacity[1] = cpu_to_be32(machine->maxram_size & 0xffffffff); + lrdr_capacity[2] = 0; + lrdr_capacity[3] = cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE); + lrdr_capacity[4] = cpu_to_be32(max_cpus/smp_threads); + ret = qemu_fdt_setprop(fdt, "/rtas", "ibm,lrdr-capacity", lrdr_capacity, + sizeof(lrdr_capacity)); + if (ret < 0) { + fprintf(stderr, "Couldn't add ibm,lrdr-capacity rtas property\n"); + return ret; + } + return 0; } diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 0aeac50..91a61ab 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -607,4 +607,6 @@ void spapr_ccs_reset_hook(void *opaque); void spapr_rtc_read(DeviceState *dev, struct tm *tm, uint32_t *ns); int spapr_rtc_import_offset(DeviceState *dev, int64_t legacy_offset); +#define SPAPR_MEMORY_BLOCK_SIZE (1 << 28) /* 256MB */ + #endif /* !defined (__HW_SPAPR_H__) */ -- 2.1.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v5 3/7] cpus: Add a macro to walk CPUs in reverse 2015-06-16 5:30 [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 1/7] spapr: Consider max_cpus during xics initialization Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 2/7] spapr: Support ibm, lrdr-capacity device tree property Bharata B Rao @ 2015-06-16 5:30 ` Bharata B Rao 2015-06-18 6:25 ` David Gibson 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 4/7] spapr: Reorganize CPU dt generation code Bharata B Rao ` (4 subsequent siblings) 7 siblings, 1 reply; 10+ messages in thread From: Bharata B Rao @ 2015-06-16 5:30 UTC (permalink / raw) To: qemu-devel Cc: thuth, aik, mdroth, agraf, qemu-ppc, tyreld, Bharata B Rao, nfont, david Add CPU_FOREACH_REVERSE that walks CPUs in reverse. Needed for PowerPC CPU device tree reorganization. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: Andreas Färber <afaerber@suse.de> --- include/qom/cpu.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 39f0f19..42f42f5 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -323,6 +323,8 @@ extern struct CPUTailQ cpus; #define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node) #define CPU_FOREACH_SAFE(cpu, next_cpu) \ QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu) +#define CPU_FOREACH_REVERSE(cpu) \ + QTAILQ_FOREACH_REVERSE(cpu, &cpus, CPUTailQ, node) #define first_cpu QTAILQ_FIRST(&cpus) DECLARE_TLS(CPUState *, current_cpu); -- 2.1.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [PATCH v5 3/7] cpus: Add a macro to walk CPUs in reverse 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 3/7] cpus: Add a macro to walk CPUs in reverse Bharata B Rao @ 2015-06-18 6:25 ` David Gibson 0 siblings, 0 replies; 10+ messages in thread From: David Gibson @ 2015-06-18 6:25 UTC (permalink / raw) To: afaerber Cc: thuth, mdroth, aik, agraf, qemu-devel, qemu-ppc, tyreld, Bharata B Rao, nfont [-- Attachment #1: Type: text/plain, Size: 637 bytes --] On Tue, Jun 16, 2015 at 11:00:14AM +0530, Bharata B Rao wrote: > Add CPU_FOREACH_REVERSE that walks CPUs in reverse. > > Needed for PowerPC CPU device tree reorganization. > > Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> > Reviewed-by: Andreas Färber <afaerber@suse.de> Andreas, I've put this into spapr-next tentatively. Are you ok with this being merged from there, or shoud it go through a different tree? -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson [-- Attachment #2: Type: application/pgp-signature, Size: 819 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v5 4/7] spapr: Reorganize CPU dt generation code 2015-06-16 5:30 [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites Bharata B Rao ` (2 preceding siblings ...) 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 3/7] cpus: Add a macro to walk CPUs in reverse Bharata B Rao @ 2015-06-16 5:30 ` Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 5/7] spapr: Consolidate cpu init code into a routine Bharata B Rao ` (3 subsequent siblings) 7 siblings, 0 replies; 10+ messages in thread From: Bharata B Rao @ 2015-06-16 5:30 UTC (permalink / raw) To: qemu-devel Cc: thuth, aik, mdroth, agraf, qemu-ppc, tyreld, Bharata B Rao, nfont, david Reorganize CPU device tree generation code so that it be reused from hotplug path. CPU dt entries are now generated from spapr_finalize_fdt() instead of spapr_create_fdt_skel(). Note: This is how the split-up looks like now: Boot path --------- spapr_finalize_fdt spapr_populate_cpus_dt_node spapr_populate_cpu_dt spapr_fixup_cpu_numa_dt spapr_fixup_cpu_smt_dt ibm,cas path ------------ spapr_h_cas_compose_response spapr_fixup_cpu_dt spapr_fixup_cpu_numa_dt spapr_fixup_cpu_smt_dt Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> --- hw/ppc/spapr.c | 284 ++++++++++++++++++++++++++++++++------------------------- 1 file changed, 159 insertions(+), 125 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 2d9fc9c..b368f9e 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -165,6 +165,27 @@ static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu, return ret; } +static int spapr_fixup_cpu_numa_dt(void *fdt, int offset, CPUState *cs) +{ + int ret = 0; + PowerPCCPU *cpu = POWERPC_CPU(cs); + int index = ppc_get_vcpu_dt_id(cpu); + uint32_t associativity[] = {cpu_to_be32(0x5), + cpu_to_be32(0x0), + cpu_to_be32(0x0), + cpu_to_be32(0x0), + cpu_to_be32(cs->numa_node), + cpu_to_be32(index)}; + + /* Advertise NUMA via ibm,associativity */ + if (nb_numa_nodes > 1) { + ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity, + sizeof(associativity)); + } + + return ret; +} + static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr) { int ret = 0, offset, cpus_offset; @@ -177,12 +198,6 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr) PowerPCCPU *cpu = POWERPC_CPU(cs); DeviceClass *dc = DEVICE_GET_CLASS(cs); int index = ppc_get_vcpu_dt_id(cpu); - uint32_t associativity[] = {cpu_to_be32(0x5), - cpu_to_be32(0x0), - cpu_to_be32(0x0), - cpu_to_be32(0x0), - cpu_to_be32(cs->numa_node), - cpu_to_be32(index)}; if ((index % smt) != 0) { continue; @@ -206,20 +221,17 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineState *spapr) } } - if (nb_numa_nodes > 1) { - ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity, - sizeof(associativity)); - if (ret < 0) { - return ret; - } - } - ret = fdt_setprop(fdt, offset, "ibm,pft-size", pft_size_prop, sizeof(pft_size_prop)); if (ret < 0) { return ret; } + ret = spapr_fixup_cpu_numa_dt(fdt, offset, cs); + if (ret < 0) { + return ret; + } + ret = spapr_fixup_cpu_smt_dt(fdt, offset, cpu, ppc_get_compat_smt_threads(cpu)); if (ret < 0) { @@ -302,18 +314,13 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base, uint32_t epow_irq) { void *fdt; - CPUState *cs; uint32_t start_prop = cpu_to_be32(initrd_base); uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); GString *hypertas = g_string_sized_new(256); GString *qemu_hypertas = g_string_sized_new(256); uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)}; uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(max_cpus)}; - int smt = kvmppc_smt_threads(); unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80}; - QemuOpts *opts = qemu_opts_find(qemu_find_opts("smp-opts"), NULL); - unsigned sockets = opts ? qemu_opt_get_number(opts, "sockets", 0) : 0; - uint32_t cpus_per_socket = sockets ? (smp_cpus / sockets) : 1; char *buf; add_str(hypertas, "hcall-pft"); @@ -399,107 +406,6 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base, _FDT((fdt_end_node(fdt))); - /* cpus */ - _FDT((fdt_begin_node(fdt, "cpus"))); - - _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); - _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); - - CPU_FOREACH(cs) { - PowerPCCPU *cpu = POWERPC_CPU(cs); - CPUPPCState *env = &cpu->env; - DeviceClass *dc = DEVICE_GET_CLASS(cs); - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); - int index = ppc_get_vcpu_dt_id(cpu); - char *nodename; - uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), - 0xffffffff, 0xffffffff}; - uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; - uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000; - uint32_t page_sizes_prop[64]; - size_t page_sizes_prop_size; - - if ((index % smt) != 0) { - continue; - } - - nodename = g_strdup_printf("%s@%x", dc->fw_name, index); - - _FDT((fdt_begin_node(fdt, nodename))); - - g_free(nodename); - - _FDT((fdt_property_cell(fdt, "reg", index))); - _FDT((fdt_property_string(fdt, "device_type", "cpu"))); - - _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR]))); - _FDT((fdt_property_cell(fdt, "d-cache-block-size", - env->dcache_line_size))); - _FDT((fdt_property_cell(fdt, "d-cache-line-size", - env->dcache_line_size))); - _FDT((fdt_property_cell(fdt, "i-cache-block-size", - env->icache_line_size))); - _FDT((fdt_property_cell(fdt, "i-cache-line-size", - env->icache_line_size))); - - if (pcc->l1_dcache_size) { - _FDT((fdt_property_cell(fdt, "d-cache-size", pcc->l1_dcache_size))); - } else { - fprintf(stderr, "Warning: Unknown L1 dcache size for cpu\n"); - } - if (pcc->l1_icache_size) { - _FDT((fdt_property_cell(fdt, "i-cache-size", pcc->l1_icache_size))); - } else { - fprintf(stderr, "Warning: Unknown L1 icache size for cpu\n"); - } - - _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq))); - _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq))); - _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr))); - _FDT((fdt_property_string(fdt, "status", "okay"))); - _FDT((fdt_property(fdt, "64-bit", NULL, 0))); - - if (env->spr_cb[SPR_PURR].oea_read) { - _FDT((fdt_property(fdt, "ibm,purr", NULL, 0))); - } - - if (env->mmu_model & POWERPC_MMU_1TSEG) { - _FDT((fdt_property(fdt, "ibm,processor-segment-sizes", - segs, sizeof(segs)))); - } - - /* Advertise VMX/VSX (vector extensions) if available - * 0 / no property == no vector extensions - * 1 == VMX / Altivec available - * 2 == VSX available */ - if (env->insns_flags & PPC_ALTIVEC) { - uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1; - - _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx))); - } - - /* Advertise DFP (Decimal Floating Point) if available - * 0 / no property == no DFP - * 1 == DFP available */ - if (env->insns_flags2 & PPC2_DFP) { - _FDT((fdt_property_cell(fdt, "ibm,dfp", 1))); - } - - page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop, - sizeof(page_sizes_prop)); - if (page_sizes_prop_size) { - _FDT((fdt_property(fdt, "ibm,segment-page-sizes", - page_sizes_prop, page_sizes_prop_size))); - } - - _FDT((fdt_property_cell(fdt, "ibm,chip-id", - cs->cpu_index / cpus_per_socket))); - - _FDT((fdt_end_node(fdt))); - } - - _FDT((fdt_end_node(fdt))); - /* RTAS */ _FDT((fdt_begin_node(fdt, "rtas"))); @@ -700,6 +606,137 @@ static int spapr_populate_memory(sPAPRMachineState *spapr, void *fdt) return 0; } +static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset, + sPAPRMachineState *spapr) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); + int index = ppc_get_vcpu_dt_id(cpu); + uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), + 0xffffffff, 0xffffffff}; + uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; + uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000; + uint32_t page_sizes_prop[64]; + size_t page_sizes_prop_size; + QemuOpts *opts = qemu_opts_find(qemu_find_opts("smp-opts"), NULL); + unsigned sockets = opts ? qemu_opt_get_number(opts, "sockets", 0) : 0; + uint32_t cpus_per_socket = sockets ? (smp_cpus / sockets) : 1; + uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)}; + + _FDT((fdt_setprop_cell(fdt, offset, "reg", index))); + _FDT((fdt_setprop_string(fdt, offset, "device_type", "cpu"))); + + _FDT((fdt_setprop_cell(fdt, offset, "cpu-version", env->spr[SPR_PVR]))); + _FDT((fdt_setprop_cell(fdt, offset, "d-cache-block-size", + env->dcache_line_size))); + _FDT((fdt_setprop_cell(fdt, offset, "d-cache-line-size", + env->dcache_line_size))); + _FDT((fdt_setprop_cell(fdt, offset, "i-cache-block-size", + env->icache_line_size))); + _FDT((fdt_setprop_cell(fdt, offset, "i-cache-line-size", + env->icache_line_size))); + + if (pcc->l1_dcache_size) { + _FDT((fdt_setprop_cell(fdt, offset, "d-cache-size", + pcc->l1_dcache_size))); + } else { + fprintf(stderr, "Warning: Unknown L1 dcache size for cpu\n"); + } + if (pcc->l1_icache_size) { + _FDT((fdt_setprop_cell(fdt, offset, "i-cache-size", + pcc->l1_icache_size))); + } else { + fprintf(stderr, "Warning: Unknown L1 icache size for cpu\n"); + } + + _FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq))); + _FDT((fdt_setprop_cell(fdt, offset, "clock-frequency", cpufreq))); + _FDT((fdt_setprop_cell(fdt, offset, "ibm,slb-size", env->slb_nr))); + _FDT((fdt_setprop_string(fdt, offset, "status", "okay"))); + _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0))); + + if (env->spr_cb[SPR_PURR].oea_read) { + _FDT((fdt_setprop(fdt, offset, "ibm,purr", NULL, 0))); + } + + if (env->mmu_model & POWERPC_MMU_1TSEG) { + _FDT((fdt_setprop(fdt, offset, "ibm,processor-segment-sizes", + segs, sizeof(segs)))); + } + + /* Advertise VMX/VSX (vector extensions) if available + * 0 / no property == no vector extensions + * 1 == VMX / Altivec available + * 2 == VSX available */ + if (env->insns_flags & PPC_ALTIVEC) { + uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1; + + _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", vmx))); + } + + /* Advertise DFP (Decimal Floating Point) if available + * 0 / no property == no DFP + * 1 == DFP available */ + if (env->insns_flags2 & PPC2_DFP) { + _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1))); + } + + page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop, + sizeof(page_sizes_prop)); + if (page_sizes_prop_size) { + _FDT((fdt_setprop(fdt, offset, "ibm,segment-page-sizes", + page_sizes_prop, page_sizes_prop_size))); + } + + _FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id", + cs->cpu_index / cpus_per_socket))); + + _FDT((fdt_setprop(fdt, offset, "ibm,pft-size", + pft_size_prop, sizeof(pft_size_prop)))); + + _FDT(spapr_fixup_cpu_numa_dt(fdt, offset, cs)); + + _FDT(spapr_fixup_cpu_smt_dt(fdt, offset, cpu, + ppc_get_compat_smt_threads(cpu))); +} + +static void spapr_populate_cpus_dt_node(void *fdt, sPAPRMachineState *spapr) +{ + CPUState *cs; + int cpus_offset; + char *nodename; + int smt = kvmppc_smt_threads(); + + cpus_offset = fdt_add_subnode(fdt, 0, "cpus"); + _FDT(cpus_offset); + _FDT((fdt_setprop_cell(fdt, cpus_offset, "#address-cells", 0x1))); + _FDT((fdt_setprop_cell(fdt, cpus_offset, "#size-cells", 0x0))); + + /* + * We walk the CPUs in reverse order to ensure that CPU DT nodes + * created by fdt_add_subnode() end up in the right order in FDT + * for the guest kernel the enumerate the CPUs correctly. + */ + CPU_FOREACH_REVERSE(cs) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + int index = ppc_get_vcpu_dt_id(cpu); + DeviceClass *dc = DEVICE_GET_CLASS(cs); + int offset; + + if ((index % smt) != 0) { + continue; + } + + nodename = g_strdup_printf("%s@%x", dc->fw_name, index); + offset = fdt_add_subnode(fdt, cpus_offset, nodename); + g_free(nodename); + _FDT(offset); + spapr_populate_cpu_dt(cs, fdt, offset, spapr); + } + +} + static void spapr_finalize_fdt(sPAPRMachineState *spapr, hwaddr fdt_addr, hwaddr rtas_addr, @@ -745,11 +782,8 @@ static void spapr_finalize_fdt(sPAPRMachineState *spapr, fprintf(stderr, "Couldn't set up RTAS device tree properties\n"); } - /* Advertise NUMA via ibm,associativity */ - ret = spapr_fixup_cpu_dt(fdt, spapr); - if (ret < 0) { - fprintf(stderr, "Couldn't finalize CPU device tree properties\n"); - } + /* cpus */ + spapr_populate_cpus_dt_node(fdt, spapr); bootlist = get_boot_devices_list(&cb, true); if (cb && bootlist) { -- 2.1.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v5 5/7] spapr: Consolidate cpu init code into a routine 2015-06-16 5:30 [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites Bharata B Rao ` (3 preceding siblings ...) 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 4/7] spapr: Reorganize CPU dt generation code Bharata B Rao @ 2015-06-16 5:30 ` Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 6/7] ppc: Update cpu_model in MachineState Bharata B Rao ` (2 subsequent siblings) 7 siblings, 0 replies; 10+ messages in thread From: Bharata B Rao @ 2015-06-16 5:30 UTC (permalink / raw) To: qemu-devel Cc: thuth, aik, mdroth, agraf, qemu-ppc, tyreld, Bharata B Rao, nfont, david Factor out bits of sPAPR specific CPU initialization code into a separate routine so that it can be called from CPU hotplug path too. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> --- hw/ppc/spapr.c | 54 +++++++++++++++++++++++++++++------------------------- 1 file changed, 29 insertions(+), 25 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b368f9e..8f1fb2e 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1408,6 +1408,34 @@ static void spapr_boot_set(void *opaque, const char *boot_device, machine->boot_order = g_strdup(boot_device); } +static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu) +{ + CPUPPCState *env = &cpu->env; + + /* Set time-base frequency to 512 MHz */ + cpu_ppc_tb_init(env, TIMEBASE_FREQ); + + /* PAPR always has exception vectors in RAM not ROM. To ensure this, + * MSR[IP] should never be set. + */ + env->msr_mask &= ~(1 << 6); + + /* Tell KVM that we're in PAPR mode */ + if (kvm_enabled()) { + kvmppc_set_papr(cpu); + } + + if (cpu->max_compat) { + if (ppc_set_compat(cpu, cpu->max_compat) < 0) { + exit(1); + } + } + + xics_cpu_setup(spapr->icp, cpu); + + qemu_register_reset(spapr_cpu_reset, cpu); +} + /* pSeries LPAR / sPAPR hardware init */ static void ppc_spapr_init(MachineState *machine) { @@ -1417,7 +1445,6 @@ static void ppc_spapr_init(MachineState *machine) const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; PowerPCCPU *cpu; - CPUPPCState *env; PCIHostState *phb; int i; MemoryRegion *sysmem = get_system_memory(); @@ -1502,30 +1529,7 @@ static void ppc_spapr_init(MachineState *machine) fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); } - env = &cpu->env; - - /* Set time-base frequency to 512 MHz */ - cpu_ppc_tb_init(env, TIMEBASE_FREQ); - - /* PAPR always has exception vectors in RAM not ROM. To ensure this, - * MSR[IP] should never be set. - */ - env->msr_mask &= ~(1 << 6); - - /* Tell KVM that we're in PAPR mode */ - if (kvm_enabled()) { - kvmppc_set_papr(cpu); - } - - if (cpu->max_compat) { - if (ppc_set_compat(cpu, cpu->max_compat) < 0) { - exit(1); - } - } - - xics_cpu_setup(spapr->icp, cpu); - - qemu_register_reset(spapr_cpu_reset, cpu); + spapr_cpu_init(spapr, cpu); } if (kvm_enabled()) { -- 2.1.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v5 6/7] ppc: Update cpu_model in MachineState 2015-06-16 5:30 [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites Bharata B Rao ` (4 preceding siblings ...) 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 5/7] spapr: Consolidate cpu init code into a routine Bharata B Rao @ 2015-06-16 5:30 ` Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 7/7] xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled Bharata B Rao 2015-06-18 6:24 ` [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites David Gibson 7 siblings, 0 replies; 10+ messages in thread From: Bharata B Rao @ 2015-06-16 5:30 UTC (permalink / raw) To: qemu-devel Cc: thuth, aik, mdroth, agraf, qemu-ppc, tyreld, Bharata B Rao, nfont, david Keep cpu_model field in MachineState uptodate so that it can be used from the CPU hotplug path. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> --- hw/ppc/mac_newworld.c | 10 +++++----- hw/ppc/mac_oldworld.c | 7 +++---- hw/ppc/ppc440_bamboo.c | 7 +++---- hw/ppc/prep.c | 7 +++---- hw/ppc/spapr.c | 7 +++---- hw/ppc/virtex_ml507.c | 7 +++---- 6 files changed, 20 insertions(+), 25 deletions(-) diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index a365bf9..c35cb14 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -145,7 +145,6 @@ static void ppc_core99_reset(void *opaque) static void ppc_core99_init(MachineState *machine) { ram_addr_t ram_size = machine->ram_size; - const char *cpu_model = machine->cpu_model; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; @@ -182,14 +181,15 @@ static void ppc_core99_init(MachineState *machine) linux_boot = (kernel_filename != NULL); /* init CPUs */ - if (cpu_model == NULL) + if (machine->cpu_model == NULL) { #ifdef TARGET_PPC64 - cpu_model = "970fx"; + machine->cpu_model = "970fx"; #else - cpu_model = "G4"; + machine->cpu_model = "G4"; #endif + } for (i = 0; i < smp_cpus; i++) { - cpu = cpu_ppc_init(cpu_model); + cpu = cpu_ppc_init(machine->cpu_model); if (cpu == NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index f26133d..1f7841e 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -75,7 +75,6 @@ static void ppc_heathrow_reset(void *opaque) static void ppc_heathrow_init(MachineState *machine) { ram_addr_t ram_size = machine->ram_size; - const char *cpu_model = machine->cpu_model; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; @@ -107,10 +106,10 @@ static void ppc_heathrow_init(MachineState *machine) linux_boot = (kernel_filename != NULL); /* init CPUs */ - if (cpu_model == NULL) - cpu_model = "G3"; + if (machine->cpu_model == NULL) + machine->cpu_model = "G3"; for (i = 0; i < smp_cpus; i++) { - cpu = cpu_ppc_init(cpu_model); + cpu = cpu_ppc_init(machine->cpu_model); if (cpu == NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index 778970a..032fa80 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -159,7 +159,6 @@ static void main_cpu_reset(void *opaque) static void bamboo_init(MachineState *machine) { ram_addr_t ram_size = machine->ram_size; - const char *cpu_model = machine->cpu_model; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; @@ -184,10 +183,10 @@ static void bamboo_init(MachineState *machine) int i; /* Setup CPU. */ - if (cpu_model == NULL) { - cpu_model = "440EP"; + if (machine->cpu_model == NULL) { + machine->cpu_model = "440EP"; } - cpu = cpu_ppc_init(cpu_model); + cpu = cpu_ppc_init(machine->cpu_model); if (cpu == NULL) { fprintf(stderr, "Unable to initialize CPU!\n"); exit(1); diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 7f52662..ea3c67d 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -506,7 +506,6 @@ static int PPC_NVRAM_set_params (Nvram *nvram, uint16_t NVRAM_size, static void ppc_prep_init(MachineState *machine) { ram_addr_t ram_size = machine->ram_size; - const char *cpu_model = machine->cpu_model; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; @@ -537,10 +536,10 @@ static void ppc_prep_init(MachineState *machine) linux_boot = (kernel_filename != NULL); /* init CPUs */ - if (cpu_model == NULL) - cpu_model = "602"; + if (machine->cpu_model == NULL) + machine->cpu_model = "602"; for (i = 0; i < smp_cpus; i++) { - cpu = cpu_ppc_init(cpu_model); + cpu = cpu_ppc_init(machine->cpu_model); if (cpu == NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 8f1fb2e..096aebb 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1440,7 +1440,6 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu) static void ppc_spapr_init(MachineState *machine) { sPAPRMachineState *spapr = SPAPR_MACHINE(machine); - const char *cpu_model = machine->cpu_model; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; @@ -1520,11 +1519,11 @@ static void ppc_spapr_init(MachineState *machine) XICS_IRQS); /* init CPUs */ - if (cpu_model == NULL) { - cpu_model = kvm_enabled() ? "host" : "POWER7"; + if (machine->cpu_model == NULL) { + machine->cpu_model = kvm_enabled() ? "host" : "POWER7"; } for (i = 0; i < smp_cpus; i++) { - cpu = cpu_ppc_init(cpu_model); + cpu = cpu_ppc_init(machine->cpu_model); if (cpu == NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index 6ebd5be..f33d398 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -197,7 +197,6 @@ static int xilinx_load_device_tree(hwaddr addr, static void virtex_init(MachineState *machine) { ram_addr_t ram_size = machine->ram_size; - const char *cpu_model = machine->cpu_model; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; hwaddr initrd_base = 0; @@ -214,11 +213,11 @@ static void virtex_init(MachineState *machine) int i; /* init CPUs */ - if (cpu_model == NULL) { - cpu_model = "440-Xilinx"; + if (machine->cpu_model == NULL) { + machine->cpu_model = "440-Xilinx"; } - cpu = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000); + cpu = ppc440_init_xilinx(&ram_size, 1, machine->cpu_model, 400000000); env = &cpu->env; qemu_register_reset(main_cpu_reset, cpu); -- 2.1.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Qemu-devel] [PATCH v5 7/7] xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled 2015-06-16 5:30 [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites Bharata B Rao ` (5 preceding siblings ...) 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 6/7] ppc: Update cpu_model in MachineState Bharata B Rao @ 2015-06-16 5:30 ` Bharata B Rao 2015-06-18 6:24 ` [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites David Gibson 7 siblings, 0 replies; 10+ messages in thread From: Bharata B Rao @ 2015-06-16 5:30 UTC (permalink / raw) To: qemu-devel Cc: thuth, aik, mdroth, agraf, qemu-ppc, tyreld, Bharata B Rao, nfont, david When supporting CPU hot removal by parking the vCPU fd and reusing it during hotplug again, there can be cases where we try to reenable KVM_CAP_IRQ_XICS CAP for the vCPU for which it was already enabled. Introduce a boolean member in ICPState to track this and don't reenable the CAP if it was already enabled earlier. Re-enabling this CAP should ideally work, but currently it results in kernel trying to create and associate ICP with this vCPU and that fails since there is already an ICP associated with it. Hence this patch is needed to work around this problem in the kernel. This change allows CPU hot removal to work for sPAPR. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> --- hw/intc/xics_kvm.c | 10 ++++++++++ include/hw/ppc/xics.h | 1 + 2 files changed, 11 insertions(+) diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c index ea886da..d58729c 100644 --- a/hw/intc/xics_kvm.c +++ b/hw/intc/xics_kvm.c @@ -331,6 +331,15 @@ static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu) abort(); } + /* + * If we are reusing a parked vCPU fd corresponding to the CPU + * which was hot-removed earlier we don't have to renable + * KVM_CAP_IRQ_XICS capability again. + */ + if (ss->cap_irq_xics_enabled) { + return; + } + if (icpkvm->kernel_xics_fd != -1) { int ret; @@ -343,6 +352,7 @@ static void xics_kvm_cpu_setup(XICSState *icp, PowerPCCPU *cpu) kvm_arch_vcpu_id(cs), strerror(errno)); exit(1); } + ss->cap_irq_xics_enabled = true; } } diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index a214dd7..355a966 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -109,6 +109,7 @@ struct ICPState { uint8_t pending_priority; uint8_t mfrr; qemu_irq output; + bool cap_irq_xics_enabled; }; #define TYPE_ICS "ics" -- 2.1.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites 2015-06-16 5:30 [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites Bharata B Rao ` (6 preceding siblings ...) 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 7/7] xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled Bharata B Rao @ 2015-06-18 6:24 ` David Gibson 7 siblings, 0 replies; 10+ messages in thread From: David Gibson @ 2015-06-18 6:24 UTC (permalink / raw) To: Bharata B Rao Cc: thuth, mdroth, aik, agraf, qemu-devel, qemu-ppc, tyreld, nfont [-- Attachment #1: Type: text/plain, Size: 1962 bytes --] On Tue, Jun 16, 2015 at 11:00:11AM +0530, Bharata B Rao wrote: > Hi, > > This patchset carries the changes that are pre-requisites to support > CPU hotplug for sPAPR guests. Thanks, applied to spapr-next. > > Changes in v5 > ------------- > - Fixed indentation issues pointed by Alexey. > - Removed the user of MSR_EP with the understanding that this or an > equivalent define can be used/introduced in a separate patch. > - Dropped the last patch "xics_kvm: Add cpu_destroy method to XICS" since > it wasn't being used in this series. > > v4 - http://lists.nongnu.org/archive/html/qemu-devel/2015-06/msg01653.html > > This series applies against spapr-next branch of David Gibson's tree. > > Bharata B Rao (7): > spapr: Consider max_cpus during xics initialization > spapr: Support ibm,lrdr-capacity device tree property > cpus: Add a macro to walk CPUs in reverse > spapr: Reorganize CPU dt generation code > spapr: Consolidate cpu init code into a routine > ppc: Update cpu_model in MachineState > xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled > > docs/specs/ppc-spapr-hotplug.txt | 18 ++ > hw/intc/xics_kvm.c | 10 ++ > hw/ppc/mac_newworld.c | 10 +- > hw/ppc/mac_oldworld.c | 7 +- > hw/ppc/ppc440_bamboo.c | 7 +- > hw/ppc/prep.c | 7 +- > hw/ppc/spapr.c | 349 ++++++++++++++++++++++----------------- > hw/ppc/spapr_rtas.c | 16 ++ > hw/ppc/virtex_ml507.c | 7 +- > include/hw/ppc/spapr.h | 2 + > include/hw/ppc/xics.h | 1 + > include/qom/cpu.h | 2 + > 12 files changed, 259 insertions(+), 177 deletions(-) > -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson [-- Attachment #2: Type: application/pgp-signature, Size: 819 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2015-06-18 6:34 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2015-06-16 5:30 [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 1/7] spapr: Consider max_cpus during xics initialization Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 2/7] spapr: Support ibm, lrdr-capacity device tree property Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 3/7] cpus: Add a macro to walk CPUs in reverse Bharata B Rao 2015-06-18 6:25 ` David Gibson 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 4/7] spapr: Reorganize CPU dt generation code Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 5/7] spapr: Consolidate cpu init code into a routine Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 6/7] ppc: Update cpu_model in MachineState Bharata B Rao 2015-06-16 5:30 ` [Qemu-devel] [PATCH v5 7/7] xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled Bharata B Rao 2015-06-18 6:24 ` [Qemu-devel] [PATCH v5 0/7] sPAPR CPU hotplug pre-requisites David Gibson
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