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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Paulo Alcantara <pcacjr@gmail.com>
Cc: pbonzini@redhat.com, seabios@seabios.org,
	Paulo Alcantara <pcacjr@zytor.com>,
	qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v4 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table
Date: Mon, 22 Jun 2015 10:40:50 +0200	[thread overview]
Message-ID: <20150622103954-mutt-send-email-mst@redhat.com> (raw)
In-Reply-To: <1434933423-10496-2-git-send-email-pcacjr@zytor.com>

On Sun, Jun 21, 2015 at 09:37:02PM -0300, Paulo Alcantara wrote:
> This block is mapped into memory space, using the Root Complex Base
> Address (RCBA) register of the PCI-to-LPC bridge. Accesses in this space
> must be limited to 32-(DW) bit quantities. Burst accesses are not
> allowed.
> 
> All Chipset Configuration Registers are located in this 16KiB space.
> 
> Signed-off-by: Paulo Alcantara <pcacjr@zytor.com>

Just to make sure, the device is in fact only functional
if it's enabled using the property, correct?
In that case please add it conditionally to the SSDT instead.

> ---
> v1 -> v2:
>   * s/PDRC/CCR/ for clarity and match ICH9 spec
>   * remove unnecessary OperationRegion for RCRB
> 
> v2 -> v3: (no changes)
> 
> v3 -> v4:
>   * quote RCRB description from ICH9 spec to commit log
>   * fix indentation issue in _CRS() method declaration
>   * create hw/i386/ich9-cc.h for chipset configuration register values
>     and use them in ASL
> ---
>  hw/i386/q35-acpi-dsdt.dsl     |  16 ++++++++++++++++
>  include/hw/i386/ich9-cc.h     |  31 +++++++++++++++++++++++++++++++
>  tests/acpi-test-data/q35/DSDT | Bin 7666 -> 7723 bytes
>  3 files changed, 47 insertions(+)
>  create mode 100644 include/hw/i386/ich9-cc.h
> 
> diff --git a/hw/i386/q35-acpi-dsdt.dsl b/hw/i386/q35-acpi-dsdt.dsl
> index 16eaca3..512c220 100644
> --- a/hw/i386/q35-acpi-dsdt.dsl
> +++ b/hw/i386/q35-acpi-dsdt.dsl
> @@ -114,6 +114,22 @@ DefinitionBlock (
>          }
>      }
>  
> +#include "hw/i386/ich9-cc.h"
> +
> +/****************************************************************
> + * Chipset Configuration Registers
> + ****************************************************************/
> +Scope(\_SB.PCI0) {
> +    Device (CCR) {
> +        Name (_HID, EISAID("PNP0C02"))
> +        Name (_UID, 1)
> +
> +        Name (_CRS, ResourceTemplate() {
> +            Memory32Fixed(ReadWrite, RCBA_BASE_ADDR, RCRB_SIZE)
> +        })
> +    }
> +}
> +
>  #include "acpi-dsdt-hpet.dsl"
>  
>  
> diff --git a/include/hw/i386/ich9-cc.h b/include/hw/i386/ich9-cc.h
> new file mode 100644
> index 0000000..675fb7f
> --- /dev/null
> +++ b/include/hw/i386/ich9-cc.h
> @@ -0,0 +1,31 @@
> +/*
> + * QEMU ICH9 Chipset Configuration Registers
> + *
> + * Copyright (c) 2015 Paulo Alcantara <pcacjr@zytor.com>
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a copy
> + * of this software and associated documentation files (the "Software"), to deal
> + * in the Software without restriction, including without limitation the rights
> + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> + * copies of the Software, and to permit persons to whom the Software is
> + * furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> + * THE SOFTWARE.
> + */
> +
> +#ifndef HW_ICH9_CC_H
> +#define HW_ICH9_CC_H
> +
> +#define RCBA_BASE_ADDR    0xfed1c000
> +#define RCRB_SIZE         0x00004000
> +
> +#endif /* HW_ICH9_CC_H */
> diff --git a/tests/acpi-test-data/q35/DSDT b/tests/acpi-test-data/q35/DSDT
> index 4723e5954dccb00995ccaf521b7daf6bf15cf1d4..f3bda7b54ea6d669b1498d9380e7781207fb6e49 100644
> GIT binary patch
> delta 81
> zcmexlz1oJ$CD<iITaJN&F>xbTJfnq$UVN}qe1Nm3L3ERjvvW{9N4$rp3y<Rk9wv_X
> lP)`>|j(F#wU_n7HzBWz<Mur0y|1mf)FjO*Z&S3140RVI`6(s-w
> 
> delta 24
> gcmZ2&^U0daCD<k8lPm)R<DrdQ@r;`nF?PxT0Bl$YHUIzs
> 
> -- 
> 2.1.0

  reply	other threads:[~2015-06-22  8:40 UTC|newest]

Thread overview: 83+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-27  0:29 [Qemu-devel] [PATCH 1/3] ich9: add TCO interface emulation Paulo Alcantara
2015-05-27  0:29 ` [Qemu-devel] [PATCH 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table Paulo Alcantara
2015-05-27 12:03   ` Paolo Bonzini
2015-05-27 17:51     ` Paulo Alcantara
2015-05-28  7:13   ` [Qemu-devel] [SeaBIOS] " Gerd Hoffmann
2015-05-30 10:57     ` Paulo Alcantara
2015-06-01  7:16       ` Gerd Hoffmann
2015-06-01 11:59         ` Paulo Alcantara
2015-05-27  0:29 ` [Qemu-devel] [PATCH 3/3] tests: add testcase for TCO watchdog emulation Paulo Alcantara
2015-05-27 11:58 ` [Qemu-devel] [PATCH 1/3] ich9: add TCO interface emulation Paolo Bonzini
2015-05-27 18:23   ` Paulo Alcantara
2015-05-30 22:04 ` [Qemu-devel] [PATCH v2 " Paulo Alcantara
2015-05-30 22:04   ` [Qemu-devel] [PATCH v2 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table Paulo Alcantara
2015-05-30 22:04   ` [Qemu-devel] [PATCH v2 3/3] tests: add testcase for TCO watchdog emulation Paulo Alcantara
2015-06-01  9:07     ` Paolo Bonzini
2015-06-01  9:05   ` [Qemu-devel] [PATCH v2 1/3] ich9: add TCO interface emulation Paolo Bonzini
2015-06-01 13:38     ` Paulo Alcantara
2015-06-01 21:37       ` Paulo Alcantara
2015-06-01 23:48   ` [Qemu-devel] [PATCH v3 " Paulo Alcantara
2015-06-01 23:48     ` [Qemu-devel] [PATCH v3 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table Paulo Alcantara
2015-06-17 13:33       ` Michael S. Tsirkin
2015-06-18  2:14         ` Paulo Alcantara
2015-06-01 23:48     ` [Qemu-devel] [PATCH v3 3/3] tests: add testcase for TCO watchdog emulation Paulo Alcantara
2015-06-17 13:37       ` Michael S. Tsirkin
2015-06-18  2:23         ` Paulo Alcantara
2015-06-10 13:17     ` [Qemu-devel] [PATCH v3 1/3] ich9: add TCO interface emulation Paulo Alcantara
2015-06-17 13:27     ` Michael S. Tsirkin
2015-06-18  2:10       ` Paulo Alcantara
2015-06-22  0:37 ` [Qemu-devel] [PATCH v4 " Paulo Alcantara
2015-06-22  0:37   ` [Qemu-devel] [PATCH v4 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table Paulo Alcantara
2015-06-22  8:40     ` Michael S. Tsirkin [this message]
2015-06-22 12:53       ` Paulo Alcantara
2015-06-23 10:38     ` [Qemu-devel] [SeaBIOS] " Igor Mammedov
2015-06-23 10:58       ` Michael S. Tsirkin
2015-06-23 12:29         ` Igor Mammedov
2015-06-23 12:37           ` Michael S. Tsirkin
2015-06-23 11:15       ` Paolo Bonzini
2015-06-23 11:18       ` Paolo Bonzini
2015-06-23 12:22       ` Michael S. Tsirkin
2015-06-22  0:37   ` [Qemu-devel] [PATCH v4 3/3] tests: add testcase for TCO watchdog emulation Paulo Alcantara
2015-06-22  8:39   ` [Qemu-devel] [PATCH v4 1/3] ich9: add TCO interface emulation Michael S. Tsirkin
2015-06-22 12:30     ` Paulo Alcantara
2015-06-22 12:32       ` Paolo Bonzini
2015-06-22 12:47         ` Michael S. Tsirkin
2015-06-22 13:04           ` Paolo Bonzini
2015-06-22 13:07             ` Michael S. Tsirkin
2015-06-22 13:19               ` Paulo Alcantara
2015-06-22 13:10           ` Markus Armbruster
2015-06-22  8:43   ` Michael S. Tsirkin
2015-06-22  9:45     ` Paolo Bonzini
2015-06-22 12:11       ` Michael S. Tsirkin
2015-06-22 12:36         ` Paulo Alcantara
2015-06-22 12:44           ` Michael S. Tsirkin
2015-06-22 12:59             ` Paolo Bonzini
2015-06-22 18:29   ` Paulo Alcantara
2015-06-22 23:10 ` [Qemu-devel] [PATCH v5 " Paulo Alcantara
2015-06-22 23:10   ` [Qemu-devel] [PATCH v5 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table Paulo Alcantara
2015-06-23 14:29     ` [Qemu-devel] [SeaBIOS] " Igor Mammedov
2015-06-23 15:33       ` Michael S. Tsirkin
2015-06-23 14:39     ` Igor Mammedov
2015-06-23 15:06       ` Michael S. Tsirkin
2015-06-23 15:12         ` Igor Mammedov
2015-06-23 15:29           ` Michael S. Tsirkin
2015-06-24 15:11     ` [Qemu-devel] " Michael S. Tsirkin
2015-06-24 16:00       ` Paulo Alcantara
2015-06-24 16:04         ` Michael S. Tsirkin
2015-06-22 23:10   ` [Qemu-devel] [PATCH v5 3/3] tests: add testcase for TCO watchdog emulation Paulo Alcantara
2015-06-23  6:39   ` [Qemu-devel] [PATCH v5 1/3] ich9: add TCO interface emulation Michael S. Tsirkin
2015-06-24 18:03 ` [Qemu-devel] [PATCH v6 1/2] " Paulo Alcantara
2015-06-24 18:03   ` [Qemu-devel] [PATCH v6 2/2] tests: add testcase for TCO watchdog emulation Paulo Alcantara
2015-06-27 17:56 ` [Qemu-devel] [PATCH v7 1/3] ich9: add TCO interface emulation Paulo Alcantara
2015-06-27 17:56   ` [Qemu-devel] [PATCH v7 2/3] tests: add testcase for TCO watchdog emulation Paulo Alcantara
2015-06-27 17:56   ` [Qemu-devel] [PATCH v7 3/3] ich9: implement strap SPKR pin logic Paulo Alcantara
2015-06-28  8:37     ` Michael S. Tsirkin
2015-06-28 16:21       ` Paulo Alcantara
2015-06-28 17:58 ` [Qemu-devel] [PATCH v8 1/3] ich9: add TCO interface emulation Paulo Alcantara
2015-06-28 17:58   ` [Qemu-devel] [PATCH v8 2/3] tests: add testcase for TCO watchdog emulation Paulo Alcantara
2015-06-28 17:58   ` [Qemu-devel] [PATCH v8 3/3] ich9: implement strap SPKR pin logic Paulo Alcantara
2015-07-01 13:18     ` Paolo Bonzini
2015-07-01 13:31       ` Michael S. Tsirkin
2015-07-01 13:34         ` Paolo Bonzini
2015-07-02  1:30         ` Paulo Alcantara
2015-07-02  6:55           ` Paolo Bonzini

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