Re: [Qemu-devel] [SeaBIOS] [PATCH v4 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table

["Michael S. Tsirkin" <mst@redhat.com>]

On Tue, Jun 23, 2015 at 12:38:59PM +0200, Igor Mammedov wrote:
 
> > +        Name (_UID, 1)
> s/1/"TCO watchdog resources"/
> > +
> > +        Name (_CRS, ResourceTemplate() {
> > +            Memory32Fixed(ReadWrite, RCBA_BASE_ADDR, RCRB_SIZE)
> since this values are dynamically programmed by BIOS
> it's incorrect to put them here statically.
> Take RCBA_BASE_ADDR from respective ICH9 register,
> which should be programmed by BIOS before ACPI tables are read by it.


Hmm this is true, isn't it?

static void ich9_lpc_rcba_update(ICH9LPCState *lpc, uint32_t rbca_old)
{
    uint32_t rbca = pci_get_long(lpc->d.config + ICH9_LPC_RCBA);

    if (rbca_old & ICH9_LPC_RCBA_EN) {
            memory_region_del_subregion(get_system_memory(), &lpc->rbca_mem);
    }
    if (rbca & ICH9_LPC_RCBA_EN) {
            memory_region_add_subregion_overlap(get_system_memory(),
                                                rbca & ICH9_LPC_RCBA_BA_MASK,
                                                &lpc->rbca_mem, 1);
    }
}

So the RBCA base must come from device config,
and in particular, this means it must be in the
SSDT since the DSDT is static.

We already have aml_memory32_fixed, e.g.

                if (misc->tpm_version != TPM_VERSION_UNSPEC) {
                    dev = aml_device("ISA.TPM");
                    aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0C31")));
                    aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
                    crs = aml_resource_template();
                    aml_append(crs, aml_memory32_fixed(TPM_TIS_ADDR_BASE,
                               TPM_TIS_ADDR_SIZE, AML_READ_WRITE));
                    aml_append(crs, aml_irq_no_flags(TPM_TIS_IRQ));
                    aml_append(dev, aml_name_decl("_CRS", crs));
                    aml_append(scope, dev);
                }

so it won't be hard to do.

-- 
MST