From: Aurelien Jarno <aurelien@aurel32.net>
To: Yongbok Kim <yongbok.kim@imgtec.com>
Cc: leon.alrae@imgtec.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v4 06/15] target-mips: raise RI exceptions when FIR.PS = 0
Date: Fri, 26 Jun 2015 00:06:43 +0200 [thread overview]
Message-ID: <20150625220643.GM931@aurel32.net> (raw)
In-Reply-To: <1435188267-54510-7-git-send-email-yongbok.kim@imgtec.com>
On 2015-06-25 00:24, Yongbok Kim wrote:
> 64-bit paired-single (PS) floating point data type is optional in the
> pre-Release 6.
> It has to raise RI exception when PS type is not implemented. (FIR.PS = 0)
> (The PS data type is removed in the Release 6.)
> Loongson-2E and Loongson-2F don't have any implementation field in FCSR0(FIR)
> but do support PS data format, therefore for these cores RI will not be
> signalled regardless of PS bit.
>
> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
> ---
> target-mips/translate.c | 78 +++++++++++++++++++++++++++--------------------
> 1 files changed, 45 insertions(+), 33 deletions(-)
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2015-06-25 22:06 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-24 23:24 [Qemu-devel] [PATCH v4 00/15] target-mips: add microMIPS32 R6 Instruction Set support Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 01/15] target-mips: fix {RD, WR}PGPR in microMIPS Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 02/15] target-mips: add microMIPS TLBINV, TLBINVF Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 03/15] target-mips: remove an unused argument Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 04/15] target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAP Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 05/15] target-mips: rearrange gen_compute_compact_branch Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 06/15] target-mips: raise RI exceptions when FIR.PS = 0 Yongbok Kim
2015-06-25 22:06 ` Aurelien Jarno [this message]
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 07/15] target-mips: signal RI for removed instructions in microMIPS R6 Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 08/15] target-mips: add microMIPS32 R6 opcode enum Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 09/15] target-mips: microMIPS32 R6 branches and jumps Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 10/15] target-mips: microMIPS32 R6 POOL32A{XF} instructions Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 11/15] target-mips: microMIPS32 R6 POOL32F instructions Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 12/15] target-mips: microMIPS32 R6 POOL32{I, C} instructions Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 13/15] target-mips: microMIPS32 R6 Major instructions Yongbok Kim
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 14/15] target-mips: microMIPS32 R6 POOL16{A, C} instructions Yongbok Kim
2015-06-25 22:06 ` Aurelien Jarno
2015-06-24 23:24 ` [Qemu-devel] [PATCH v4 15/15] target-mips: add mips32r6-generic CPU definition Yongbok Kim
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