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Date: Thu, 2 Jul 2015 10:52:28 +0300
From: Antony Pavlov <antonynpavlov@gmail.com>
Message-Id: <20150702105228.22675cfefe7d1760fb50afcb@gmail.com>
In-Reply-To: <478545ddab5b50a804bed4eea1c8f38e155335fa.1435723168.git.serge.vakulenko@gmail.com>
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	<478545ddab5b50a804bed4eea1c8f38e155335fa.1435723168.git.serge.vakulenko@gmail.com>
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Subject: Re: [Qemu-devel] [PATCH pic32 v2 2/5] Fixed random index generation
 for TLBWR instruction. It was not quite random and did not skip Wired
 entries.
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To: Serge Vakulenko <serge.vakulenko@gmail.com>
Cc: Leon Alrae <leon.alrae@imgtec.com>, qemu-devel@nongnu.org, Aurelien Jarno <aurelien@aurel32.net>

On Tue, 30 Jun 2015 21:12:31 -0700
Serge Vakulenko <serge.vakulenko@gmail.com> wrote:

> Signed-off-by: Serge Vakulenko <serge.vakulenko@gmail.com>
> ---
>  hw/mips/cputimer.c | 18 +++++-------------
>  1 file changed, 5 insertions(+), 13 deletions(-)
>=20
> diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c
> index 4f02a9f..94a29df 100644
> --- a/hw/mips/cputimer.c
> +++ b/hw/mips/cputimer.c
> @@ -25,21 +25,13 @@
>  #include "qemu/timer.h"
>  #include "sysemu/kvm.h"
> =20
> -#define TIMER_FREQ	100 * 1000 * 1000
> -

This is a part of the 'Speed of MIPS CPU timer made configurable per platfo=
rm.' patch.

--=A0
Best regards,
=A0 Antony Pavlov