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From: "Michael S. Tsirkin" <mst@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Hervé Poussineau" <hpoussin@reactos.org>,
	"QEMU Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH] virtio-pci: implement cfg capability
Date: Mon, 6 Jul 2015 13:31:56 +0300	[thread overview]
Message-ID: <20150706132538-mutt-send-email-mst@redhat.com> (raw)
In-Reply-To: <CAFEAcA-EdJKgOHzKRr9e1XZu05FHRarZXC-gpAvUCnAL98FQXA@mail.gmail.com>

On Mon, Jul 06, 2015 at 11:04:24AM +0100, Peter Maydell wrote:
> On 6 July 2015 at 11:03, Michael S. Tsirkin <mst@redhat.com> wrote:
> > On Mon, Jul 06, 2015 at 10:11:18AM +0100, Peter Maydell wrote:
> >> But address_space_rw() is just the "memcpy bytes to the
> >> target's memory" operation -- if you have a pile of bytes
> >> then there are no endianness concerns. If you don't have
> >> a pile of bytes then you need to know the structure of
> >> the data you're DMAing around, and you should probably
> >> have a loop doing things with the specify-the-width functions.
> 
> > Absolutely. But what if DMA happens to target another device
> > and not memory? Device needs some endian-ness so it needs
> > to be converted to that.
> 
> Yes, and address_space_rw() already deals with conversion to
> that device's specified endianness.
> 
> -- PMM

Yes, but incorrectly if target endian != host endian.
For example, LE target and LE device on BE host.

IO callbacks always get a native endian format so they expect to get
byte 0 of the buffer in MSB on this host.


-- 
MST

  reply	other threads:[~2015-07-06 10:32 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-02 13:00 [Qemu-devel] [PATCH] virtio-pci: implement cfg capability Michael S. Tsirkin
2015-07-02 18:48 ` Paolo Bonzini
2015-07-02 19:00   ` Michael S. Tsirkin
2015-07-02 19:02     ` Paolo Bonzini
2015-07-04 21:19       ` Michael S. Tsirkin
2015-07-06  7:46         ` Paolo Bonzini
2015-07-06  8:33           ` Michael S. Tsirkin
2015-07-06  8:46             ` Paolo Bonzini
2015-07-06  9:06               ` Michael S. Tsirkin
2015-07-06  9:11                 ` Peter Maydell
2015-07-06 10:03                   ` Michael S. Tsirkin
2015-07-06 10:04                     ` Peter Maydell
2015-07-06 10:31                       ` Michael S. Tsirkin [this message]
2015-07-06 11:50                         ` Peter Maydell
2015-07-06 12:04                           ` Paolo Bonzini
2015-07-06 12:15                             ` Michael S. Tsirkin
2015-07-06 12:12                           ` Michael S. Tsirkin
2015-07-06 12:23                             ` Paolo Bonzini
2015-07-03  9:34 ` Gerd Hoffmann

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