From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48070) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZCBrW-0006FZ-VC for qemu-devel@nongnu.org; Mon, 06 Jul 2015 15:15:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZCBrU-0008Q9-2R for qemu-devel@nongnu.org; Mon, 06 Jul 2015 15:15:30 -0400 Date: Mon, 6 Jul 2015 21:15:14 +0200 From: Thomas Huth Message-ID: <20150706211514.7bf5d19e@thh440s> In-Reply-To: <1436148670-6592-8-git-send-email-aik@ozlabs.ru> References: <1436148670-6592-1-git-send-email-aik@ozlabs.ru> <1436148670-6592-8-git-send-email-aik@ozlabs.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH qemu v10 07/14] spapr_iommu: Add root memory region List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexey Kardashevskiy Cc: Michael Roth , qemu-devel@nongnu.org, Gavin Shan , Alex Williamson , qemu-ppc@nongnu.org, David Gibson On Mon, 6 Jul 2015 12:11:03 +1000 Alexey Kardashevskiy wrote: > We are going to have multiple DMA windows at different offsets on > a PCI bus. For the sake of migration, we will have as many TCE table > objects pre-created as many windows supported. > So we need a way to map windows dynamically onto a PCI bus > when migration of a table is completed but at this stage a TCE table > object does not have access to a PHB to ask it to map a DMA window > backed by just migrated TCE table. > > This adds a "root" memory region (UINT64_MAX long) to the TCE object. > This new region is mapped on a PCI bus with enabled overlapping as > there will be one root MR per TCE table, each of them mapped at 0. > The actual IOMMU memory region is a subregion of the root region and > a TCE table enables/disables this subregion and maps it at > the specific offset inside the root MR which is 1:1 mapping of > a PCI address space. > > Signed-off-by: Alexey Kardashevskiy > Reviewed-by: David Gibson > --- > hw/ppc/spapr_iommu.c | 13 ++++++++++--- > hw/ppc/spapr_pci.c | 2 +- > include/hw/ppc/spapr.h | 2 +- > 3 files changed, 12 insertions(+), 5 deletions(-) > > diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c > index 1378a7a..45c00d8 100644 > --- a/hw/ppc/spapr_iommu.c > +++ b/hw/ppc/spapr_iommu.c > @@ -171,11 +171,16 @@ static MemoryRegionIOMMUOps spapr_iommu_ops = { > static int spapr_tce_table_realize(DeviceState *dev) > { > sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev); > + Object *tcetobj = OBJECT(tcet); > + char tmp[32]; > > tcet->fd = -1; > > - memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops, > - "iommu-spapr", 0); > + snprintf(tmp, sizeof(tmp), "tce-root-%x", tcet->liobn); > + memory_region_init(&tcet->root, tcetobj, tmp, UINT64_MAX); > + > + snprintf(tmp, sizeof(tmp), "tce-iommu-%x", tcet->liobn); > + memory_region_init_iommu(&tcet->iommu, tcetobj, &spapr_iommu_ops, tmp, 0); > > QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list); > > @@ -221,6 +226,7 @@ static void spapr_tce_table_do_enable(sPAPRTCETable *tcet, bool vfio_accel) > > memory_region_set_size(&tcet->iommu, > (uint64_t)tcet->nb_table << tcet->page_shift); > + memory_region_add_subregion(&tcet->root, tcet->bus_offset, &tcet->iommu); > > tcet->enabled = true; > } > @@ -246,6 +252,7 @@ void spapr_tce_table_disable(sPAPRTCETable *tcet) > return; > } > > + memory_region_del_subregion(&tcet->root, &tcet->iommu); > memory_region_set_size(&tcet->iommu, 0); > > spapr_tce_free_table(tcet->table, tcet->fd, tcet->nb_table); > @@ -268,7 +275,7 @@ static void spapr_tce_table_unrealize(DeviceState *dev, Error **errp) > > MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet) > { > - return &tcet->iommu; > + return &tcet->root; > } > > static void spapr_tce_reset(DeviceState *dev) > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c > index 3ddd72f..e27ca15 100644 > --- a/hw/ppc/spapr_pci.c > +++ b/hw/ppc/spapr_pci.c > @@ -1405,7 +1405,7 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) > error_setg(errp, "failed to create TCE table"); > return; > } > - memory_region_add_subregion(&sphb->iommu_root, tcet->bus_offset, > + memory_region_add_subregion(&sphb->iommu_root, 0, > spapr_tce_get_iommu(tcet)); > > sphb->msi = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free); > diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h > index 1da0ade..e32e787 100644 > --- a/include/hw/ppc/spapr.h > +++ b/include/hw/ppc/spapr.h > @@ -560,7 +560,7 @@ struct sPAPRTCETable { > uint64_t *table; > bool bypass; > int fd; > - MemoryRegion iommu; > + MemoryRegion root, iommu; > struct VIOsPAPRDevice *vdev; /* for @bypass migration compatibility only */ > QLIST_ENTRY(sPAPRTCETable) list; > }; Reviewed-by: Thomas Huth