Re: [Qemu-devel] [RFC 0/6] vSMMU initialization

[Will Deacon <will.deacon@arm.com>]

On Wed, Jul 15, 2015 at 06:28:54PM +0100, Varun Sethi wrote:
> > > > On Fri, Jun 12, 2015 at 03:20:04PM +0100, Baptiste Reynal wrote:
> > > > > The ARM SMMU has support for 2-stages address translations,
> > > > > allowing a virtual address to be translated at two levels:
> > > > > - Stage 1 translates a virtual address (VA) into an intermediate
> > > > > physical address (IPA)
> > > > > - Stage 2 translates an IPA into a physical address (PA)
> > > > >
> > > > > Will Deacon introduced a virtual SMMU interface for KVM, which
> > > > > gives a virtual machine the possibility to use an IOMMU with native
> > drivers.
> > > > > While the VM will program the first stage of translation (stage
> > > > > 1), the interface will program the second (stage 2) on the physical
> > SMMU.
> > > >
> > > > Please note that I have no plans to merge the kernel-side of this at
> > > > the moment. It was merely an exploratory tool to see what a non-PV
> > > > vSMMU implementation might look like and certainly not intended to
> > > > be used in anger.
> > > How do you see the context fault reporting work for the PV interface?
> > 
> > We could have an interrupt, for the PV IOMMU and have the hypervisor
> > inject that, no?
> > 
> Can you please elaborate on the PV IOMMU interface. I want to understand
> how context fault information would be communicated to the guest.

I replied to this the other day!

My assumption is that we'd have an irq and some memory region to describe
the fault in as general a way as possible. Whether that memory region
looks like MMIO registers or something like a virtio ring buffer is an
implementation detail to be resolved by prototyping.

Will