Re: [Qemu-devel] [PATCH for-2.4] tcg/i386: Implement trunc_shr_i32

[Aurelien Jarno <aurelien@aurel32.net>]

On 2015-07-18 08:58, Richard Henderson wrote:
> Enforce the invariant that 32-bit quantities are zero extended
> in the register.  This avoids having to re-zero-extend at memory
> accesses for 32-bit guests.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
> Here's an alternative to the other things we've been considering.
> We could even make this conditional on USER_ONLY if you like.
> 
> This does in fact fix the mips test case.  Consider the fact that
> memory operations are probably more common than truncations, and
> it would seem that we have a net size win by forcing the truncate
> over adding a byte for the ADDR32 (or 2 bytes for a zero-extend).

I think we should go with your previous patch for 2.4, and think calmly
about how to do that better for 2.5. It slightly increases the generated
code, but only in bytes, not in number of instructions, so I don't think
the performance impact is huge.

> Indeed, for 2.5, we could look at dropping the existing zero-extend
> from the softmmu path.  Also for 2.5, split trunc_shr into two parts,

From a quick look, we need to move the address to new registers anyway,
so not zero-extending will mean adding the REXW prefix.

> trunc_lo and trunc_hi.  No one really uses any other value for the
> shift, and x86 could really use different constraints for the two.

That sounds like a good idea.

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net