From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33605) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJkAq-0000IJ-CV for qemu-devel@nongnu.org; Mon, 27 Jul 2015 11:18:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZJkAl-000268-AL for qemu-devel@nongnu.org; Mon, 27 Jul 2015 11:18:40 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44871) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJkAl-00025d-5C for qemu-devel@nongnu.org; Mon, 27 Jul 2015 11:18:35 -0400 Date: Mon, 27 Jul 2015 18:18:30 +0300 From: "Michael S. Tsirkin" Message-ID: <20150727181408-mutt-send-email-mst@redhat.com> References: <015a01d0c85c$b52b61d0$1f822570$@samsung.com> <20150727152658.3f3740f7@nial.brq.redhat.com> <003401d0c879$937041b0$ba50c510$@samsung.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <003401d0c879$937041b0$ba50c510$@samsung.com> Subject: Re: [Qemu-devel] [PATCH v3] hw/arm/virt: Add high MMIO PCI region List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Pavel Fedin Cc: 'Igor Mammedov' , 'Alexander Graf' , pbonzini@redhat.com, 'QEMU Developers' , 'Peter Maydell' On Mon, Jul 27, 2015 at 05:36:07PM +0300, Pavel Fedin wrote: > Hello! > > > > + /* High MMIO space */ > > > + mmio_alias = g_new0(MemoryRegion, 1); > > > + memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio-high", > > > + mmio_reg, base_mmio_high, size_mmio_high); > > > + memory_region_add_subregion(get_system_memory(), base_mmio_high, mmio_alias); > > Is there any specific reason to have 2 separate regions vs using 1 like in > > pc_pci_as_mapping_init() > > using region priority instead of splitting. > > Unfortunately i'm not familiar very well with qemu memory internals. I saw PC code and i know that > it adds PCI region of the size of the whole memory, then adds other things as overlapped regions. > But wouldn't it be some resource waste in this case? I understand that in PC absolutely all "unused" > addresses fall through to PCI, so that any device can plug in there. On ARM this is different, PCI > controller is not a core of the system, it's just one of devices instead. And on our case a huge > part of PCI region between VIRT_PCIE_MMIO and VIRT_PCIE_MMIO_HIGH would never be used. Does it worth > that ? > > Kind regards, > Pavel Fedin > Expert Engineer > Samsung Electronics Research center Russia It's more a question of figuring out what does real hardware do. It's true, PIIX has this "everything that isn't memory is PCI" assumption. We do this for Q35 but I'm not even sure it's the right thing to do there. If as you say real ARM hardware doesn't work like this, then QEMU shouldn't do this for ARM. -- MST