From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39469) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZKQ14-0000nd-GH for qemu-devel@nongnu.org; Wed, 29 Jul 2015 07:59:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZKQ10-0006gr-3x for qemu-devel@nongnu.org; Wed, 29 Jul 2015 07:59:22 -0400 Received: from mx1.redhat.com ([209.132.183.28]:55343) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZKQ0z-0006gg-V6 for qemu-devel@nongnu.org; Wed, 29 Jul 2015 07:59:18 -0400 Date: Wed, 29 Jul 2015 13:59:14 +0200 From: Igor Mammedov Message-ID: <20150729135914.0beab8c8@nial.brq.redhat.com> In-Reply-To: <00f501d0c9e3$b3d19380$1b74ba80$@samsung.com> References: <015a01d0c85c$b52b61d0$1f822570$@samsung.com> <20150729111055.2bf307ac@nial.brq.redhat.com> <00f501d0c9e3$b3d19380$1b74ba80$@samsung.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3] hw/arm/virt: Add high MMIO PCI region List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Pavel Fedin Cc: 'Peter Maydell' , 'Alexander Graf' , 'QEMU Developers' , pbonzini@redhat.com On Wed, 29 Jul 2015 12:48:18 +0300 Pavel Fedin wrote: > Hello! > > > this is wrong since dword is too small for values of high memory > > use aml_qword_memory() instead > > Thanks, will fix it. > > > since window is at fixed position and it's not possible for guest to > > move base address of the range, make AddressMaximum the same as AddressMinimum i.e. > > But it is anyway not possible. On ARM hardware PCI range addresses are normally hardwired (at least > on simple machine which we are emulating), and the OS doesn't have control over it. And i'm not sure > whether some hotplugged memory can be overlaid on top of it. This is because on PC PCI is a core > system bus, which represents all address space, and RAM is kind of plugged into it. On ARM another > buses are used for system core, and PCI controller, from the point of view of that bus, is a single > device, which occupies some space. So AFAIK having something else on top of PCI hole on ARM would be > abnormal. I don't suggest to have something mapped on top of the window, Suggestion was to just use the same value for AddressMaximum and AddressMinimum arguments in aml_qword_memory() call. > > Kind regards, > Pavel Fedin > Expert Engineer > Samsung Electronics Research center Russia > > >