From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54496) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZWot2-0004Km-Ay for qemu-devel@nongnu.org; Tue, 01 Sep 2015 12:58:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZWosz-0004Ta-G8 for qemu-devel@nongnu.org; Tue, 01 Sep 2015 12:58:20 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33474) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZWosz-0004SX-9U for qemu-devel@nongnu.org; Tue, 01 Sep 2015 12:58:17 -0400 Date: Tue, 1 Sep 2015 13:58:12 -0300 From: Eduardo Habkost Message-ID: <20150901165812.GA30358@thinpad.lan.raisama.net> References: <1440004102-4822-1-git-send-email-ehabkost@redhat.com> <20150901143900.44f43b44@nial.brq.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: <20150901143900.44f43b44@nial.brq.redhat.com> Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] target-i386: Disable cache info passthrough by default List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: Paolo Bonzini , qemu-devel@nongnu.org, =?iso-8859-1?Q?Beno=EEt?= Canet On Tue, Sep 01, 2015 at 02:39:00PM +0200, Igor Mammedov wrote: > On Wed, 19 Aug 2015 10:08:22 -0700 > Eduardo Habkost wrote: >=20 > > The host cache information may not make sense for the guest if the VM > > CPU topology doesn't match the host CPU topology. To make sure we won= 't > > expose broken cache information to the guest, disable cache info > > passthrough by default, and add a new "host-cache-info" property that > > can be used to enable the old behavior for users that really need it. > >=20 > > Cc: Beno=EEt Canet > > Signed-off-by: Eduardo Habkost > > --- > > target-i386/cpu.c | 4 +--- > > 1 file changed, 1 insertion(+), 3 deletions(-) > >=20 > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > > index cfb8aa7..3a71f15 100644 > > --- a/target-i386/cpu.c > > +++ b/target-i386/cpu.c > > @@ -689,7 +689,6 @@ struct X86CPUDefinition { > > int stepping; > > FeatureWordArray features; > > char model_id[48]; > > - bool cache_info_passthrough; > > }; > > =20 > > static X86CPUDefinition builtin_x86_defs[] =3D { > > @@ -1416,6 +1415,7 @@ static X86CPUDefinition host_cpudef; > > =20 > > static Property host_x86_cpu_properties[] =3D { > > DEFINE_PROP_BOOL("migratable", X86CPU, migratable, true), > > + DEFINE_PROP_BOOL("host-cache-info", X86CPU, cache_info_passthrou= gh, false), > > DEFINE_PROP_END_OF_LIST() > > }; > > =20 > > @@ -1442,7 +1442,6 @@ static void host_x86_cpu_class_init(ObjectClass= *oc, void *data) > > cpu_x86_fill_model_id(host_cpudef.model_id); > > =20 > > xcc->cpu_def =3D &host_cpudef; > > - host_cpudef.cache_info_passthrough =3D true; > > =20 > > /* level, xlevel, xlevel2, and the feature words are initialized= on > > * instance_init, because they require KVM to be initialized. > > @@ -2076,7 +2075,6 @@ static void x86_cpu_load_def(X86CPU *cpu, X86CP= UDefinition *def, Error **errp) > > object_property_set_int(OBJECT(cpu), def->stepping, "stepping", = errp); > > object_property_set_int(OBJECT(cpu), def->xlevel, "xlevel", errp= ); > > object_property_set_int(OBJECT(cpu), def->xlevel2, "xlevel2", er= rp); > > - cpu->cache_info_passthrough =3D def->cache_info_passthrough; > Isn't that a guest visible change? It is. I am not convinced we should spend time trying to make live migration work with -cpu host unless we hear from an actual user that depend on it, but in this case it is really simple to keep compatibility by adding host-cache-info=3Don to PC_COMPAT_2_4, so I will send a new version. >=20 > > object_property_set_str(OBJECT(cpu), def->model_id, "model-id", = errp); > > for (w =3D 0; w < FEATURE_WORDS; w++) { > > env->features[w] =3D def->features[w]; >=20 --=20 Eduardo