From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56606) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXJrS-0000nR-Rd for qemu-devel@nongnu.org; Wed, 02 Sep 2015 22:02:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZXJrN-0006dE-RW for qemu-devel@nongnu.org; Wed, 02 Sep 2015 22:02:46 -0400 Date: Thu, 3 Sep 2015 12:02:31 +1000 From: Paul Mackerras Message-ID: <20150903020231.GA15170@iris.ozlabs.ibm.com> References: <20141105071019.26196.93729.stgit@aravindap> <20141111032421.GH15270@voom.redhat.com> <546C2F4A.5010708@linux.vnet.ibm.com> <551CC55B.3050901@ozlabs.ru> <20150402044625.GA25823@voom.redhat.com> <55950058.8040508@ozlabs.ru> <20150703060102.GB16378@voom.redhat.com> <559CDF1D.9090103@linux.vnet.ibm.com> <20150807033745.GA4645@tungsten.ozlabs.ibm.com> <55C75B3E.70409@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <55C75B3E.70409@suse.de> Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 0/4] target-ppc: Add FWNMI support in qemu for powerKVM guests List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: benh@au1.ibm.com, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, aravinda@linux.vnet.ibm.com, Sam Bobroff , David Gibson On Sun, Aug 09, 2015 at 03:53:02PM +0200, Alexander Graf wrote: > > > On 07.08.15 05:37, Sam Bobroff wrote: > > The RTAS call being discussed in this thread actually has two vectors to patch > > (System Reset and Machine Check), and the patches so far only address the > > Machine Check part. I've been looking at filling in the System Reset part and > > that will mean basing my code on top of this set. I would like to keep the > > same style of solution for both vectors, so I'd like to get the discussion > > started again :-) > > > > So (1) do we use a trampoline in guest memory, and if so (2) how is the > > trampoline code handled? > > > > (1) It does seem simpler to me to deliver directly to the handler, but I'm > > worried about a few things: > > > > If a guest were to call ibm,nmi-register and then kexec to a new kernel that > > does not call ibm,nmi-register, would the exception cause a jump to a stale > > address? > > Probably - how does that get handled today with pHyp? Does pHyp just > override the actual exception vector code and thus the kexec'ed code > path gets overwritten? > > I don't remember the original patch set fully, but if all we need is to > override 0x200, why can't we replace the code with > > mtsprg scratch, r0 > li r0, HCALL_KVM_MC > sc 1 > > then there is no complexity in that code at all with dynamically patched > bits. Or am I missing the obvious? Well, sc 1 will overwrite SRR0/1, and as far as I can see SRR0/1 have the only record of where the machine check occurred. So we can't use sc 1 unless we first save SRR0/1 somewhere. We could instead use some specific illegal instruction, which will cause a hypervisor emulation assist interrupt using HSRR0/1. Paul.