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Date: Thu, 3 Sep 2015 15:18:23 +1000
From: Paul Mackerras <paulus@ozlabs.org>
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Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 0/4] target-ppc: Add FWNMI
 support in qemu for powerKVM guests
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To: David Gibson <david@gibson.dropbear.id.au>
Cc: benh@au1.ibm.com, Alexander Graf <agraf@suse.de>, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, Aravinda Prasad <aravinda@linux.vnet.ibm.com>, Sam Bobroff <sam.bobroff@au1.ibm.com>

On Thu, Sep 03, 2015 at 03:05:21PM +1000, David Gibson wrote:
> On Thu, Sep 03, 2015 at 01:24:21PM +1000, Sam Bobroff wrote:
> > PAPR only says SPRGs 0 to 3 are for software use, but the kernel (see
> > arch/powerpc/include/asm/reg.h) defines SPRG2 as an exception scratch=
 register
> > so it should be the right one to use here.
>=20
> Uh.. no.  If 0..3 are for software (i.e. OS) use, then this needs to
> use a different one, since it's being used as a firmware resource
> here.  Linux might treat SPRG2 as scratch, but another OS would be
> within its rights to use it for something persistent.

PAPR says in requirement R1-14.1.2-3 "To avoid conflict with the
platform=E2=80=99s hypervisor, the OS must be prepared to share use of SP=
RG2
as the interrupt scratch register whenever an hcall() is made, or a
machine check or reset interrupt is taken."  So, SPRG2 is the one to
use here.

Paul.