From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38277) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZZKLa-0008R2-I7 for qemu-devel@nongnu.org; Tue, 08 Sep 2015 10:58:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZZKLS-00086h-T2 for qemu-devel@nongnu.org; Tue, 08 Sep 2015 10:58:10 -0400 Received: from mail-bn1on0090.outbound.protection.outlook.com ([157.56.110.90]:20096 helo=na01-bn1-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZZKLS-00086Y-Mz for qemu-devel@nongnu.org; Tue, 08 Sep 2015 10:58:02 -0400 Date: Tue, 8 Sep 2015 16:57:55 +0200 From: "Edgar E. Iglesias" Message-ID: <20150908145755.GH12618@toto> References: <1441311266-8644-1-git-send-email-edgar.iglesias@gmail.com> <1441311266-8644-8-git-send-email-edgar.iglesias@gmail.com> <20150908144236.GF12618@toto> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH v1 07/10] target-arm: Supress the use of TTBR1 for S2 translations List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: "Edgar E. Iglesias" , Sergey Fedorov , Alex =?iso-8859-1?Q?Benn=E9e?= , QEMU Developers , Alexander Graf On Tue, Sep 08, 2015 at 03:50:34PM +0100, Peter Maydell wrote: > On 8 September 2015 at 15:42, Edgar E. Iglesias > wrote: > > On Tue, Sep 08, 2015 at 03:32:36PM +0100, Peter Maydell wrote: > >> On 3 September 2015 at 21:14, Edgar E. Iglesias > >> wrote: > >> > From: "Edgar E. Iglesias" > >> > > >> > Stage-2 MMU translations do not use TTBR1. > >> > > >> > Signed-off-by: Edgar E. Iglesias > >> > --- > >> > target-arm/helper.c | 5 +++++ > >> > 1 file changed, 5 insertions(+) > >> > > >> > diff --git a/target-arm/helper.c b/target-arm/helper.c > >> > index 9ea9719..66b3fed 100644 > >> > --- a/target-arm/helper.c > >> > +++ b/target-arm/helper.c > >> > @@ -6372,6 +6372,11 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, > >> > } > >> > } > >> > > >> > + /* Stage2 translations do not use TTBR1. */ > >> > + if (mmu_idx == ARMMMUIdx_S2NS) { > >> > + ttbr1_valid = false; > >> > + } > >> > + > >> > >> I think this is unnecessary, because we've already set ttbr1_valid > >> to false in the previous chunk of code for the case where el == 2 > >> (as it is for stage 2 translations). > > > > I think we may be confused here. > > > > Note S2NS translations are controlled by EL2 but apply to NS EL0 and EL1. > > Yep. el is the result of regime_el(), which returns what the ARM ARM > calls "the EL that the translation regime is controlled from". > In particular, we do things this way because it's the register width > of the controlling EL that determines whether the translation > regime is 64 bit, whether the TCR/TTBR/etc registers are the 64-bit > forms or not, etc. OK, I see. I'll have another look at this... Thanks! Edgar