From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47204) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zf6sq-00023p-Io for qemu-devel@nongnu.org; Thu, 24 Sep 2015 09:48:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zf6sn-0004Ws-CI for qemu-devel@nongnu.org; Thu, 24 Sep 2015 09:48:24 -0400 Received: from mail-by2on0072.outbound.protection.outlook.com ([207.46.100.72]:62496 helo=na01-by2-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zf6sm-0004WU-Qa for qemu-devel@nongnu.org; Thu, 24 Sep 2015 09:48:21 -0400 Date: Thu, 24 Sep 2015 06:47:46 -0700 From: "Edgar E. Iglesias" Message-ID: <20150924134607.GA16869@toto> References: <1442672127-26223-1-git-send-email-edgar.iglesias@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH RFC 0/8] arm: Steps towards EL2 support round 5 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: "Edgar E. Iglesias" , Sergey Fedorov , Alex =?iso-8859-1?Q?Benn=E9e?= , QEMU Developers , Alexander Graf On Wed, Sep 23, 2015 at 10:11:19AM -0700, Peter Maydell wrote: > On 19 September 2015 at 07:15, Edgar E. Iglesias > wrote: > > From: "Edgar E. Iglesias" > > > > Hi, > > > > Another round of patches towards EL2 support. This one adds partial > > support for 2-stage MMU for AArch64. I've marked it RFC because I > > expect a few iterations. Once we can settle on the approach I'll > > add the AArch32 support (changes for arm_ldl_ptw etc). I've probably > > missed alot of details aswell. > > > > Some of the details of error reporting are intentionally missing, I > > was thinking to add those incrementally as they get quite involved > > (e.g the register target and memory access size). > > > > Some of the patches at the start of the series might be good already, > > please pick them up if you agree Peter! > > > > Comments welcome! > > > > Best regards, > > Edgar > > > > Edgar E. Iglesias (8): > > target-arm: Add HPFAR_EL2 > > target-arm: Add computation of starting level for S2 PTW > > target-arm: Add support for S2 page-table protection bits > > target-arm: Avoid inline for get_phys_addr > > target-arm: Add ARMMMUFaultInfo > > target-arm: Add S2 translation support for S1 PTW > > target-arm: Route S2 MMU faults to EL2 > > target-arm: Add support for S1 + S2 MMU translations > > I've reviewed the easy patches at the start of this series. > IIRC you said you'd found some issues with it anyway and were > planning to do a v2 in a bit, so I'll wait for that rather > than trying to tackle the last few patches now. > Thanks Peter, I'll fix up the stuff you commented on and post a v2. Cheers, Edgar