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From: Andrew Jones <drjones@redhat.com>
To: Pavel Fedin <p.fedin@samsung.com>
Cc: 'Peter Maydell' <peter.maydell@linaro.org>,
	'Peter Crosthwaite' <crosthwaitepeter@gmail.com>,
	qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] ARM CPU affinities
Date: Tue, 29 Sep 2015 08:15:30 +0200	[thread overview]
Message-ID: <20150929061530.GB4671@hawk.localdomain> (raw)
In-Reply-To: <020b01d0fa03$720720a0$561561e0$@samsung.com>

On Mon, Sep 28, 2015 at 06:36:29PM +0300, Pavel Fedin wrote:
>  Hello!
> 
> > I think we'll need to cache mpidr in the vcpu data in order to properly
> > reset it.
> 
>  We already have it in our data. I took a quick look at that, but kernel needs patching. IIRC reset

Right. I was referring to the kernel's vcpu data (struct kvm_vcpu).

> for secondary vCPUs happens inside kernel's PSCI code, before primary tells it to start up. You
> cannot separate these two events.
>  In a short: you can use KVM_SET_ONE_REG for the MPIDR, and the value will go into kernel, but as
> soon as you call KVM_VCPU_RUN for the secondary, it gets reset.

My current thinking is that we'll set MPIDR with KVM_SET_ONE_REG, which
will also set the cached value in struct kvm_vcpu. Reset will then use
that value.

Thanks,
drew

  reply	other threads:[~2015-09-29  6:15 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-27 21:28 [Qemu-devel] ARM CPU affinities Peter Crosthwaite
2015-09-28  9:13 ` Peter Maydell
2015-09-28 11:49   ` Pavel Fedin
2015-09-28 15:12   ` Andrew Jones
2015-09-28 15:16     ` Pavel Fedin
2015-09-28 15:24       ` Andrew Jones
2015-09-28 15:36         ` Pavel Fedin
2015-09-29  6:15           ` Andrew Jones [this message]
2015-09-29  9:17             ` Peter Maydell
2015-09-28 16:56   ` Peter Crosthwaite
2015-09-28 17:04     ` Pavel Fedin

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